EPM7128ELC84-20 vs EPM7128ELC84-12 Comparison
Detailed side-by-side comparison of EPM7128ELC84-20 by Altera and EPM7128ELC84-12 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128ELC84-20
EPM7128ELC84-20 - MAX 7000 CPLD, 128MC, 20ns, 5V, PLCC-84 | Altera
EPM7128ELC84-20 ObsoleteAltera
EPM7128ELC84-12
EPM7128ELC84-12 - 128-Macrocell MAX 7000 CPLD, 12ns, 84-PLCC
EPM7128ELC84-12 ObsoleteSpecification Comparison
| Parameter | EPM7128ELC84-20 | EPM7128ELC84-12 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $24.20 | $10.40 |
| Series | MAX 7000 | β |
| Device Family | EPM7128 (CPLD) | β |
| Number of Macrocells | 128 | β |
| Number of Usable Gates | 2500 | β |
| Number of User I/Os | 68 | β |
| Number of Logic Array Blocks (LABs) | 8 | β |
| Propagation Delay (tPD) | 20 ns | β |
| Maximum Frequency (fCNT) | 62.5 MHz | β |
| Supply Voltage (VCC) | 5 V | β |
| Supply Voltage Tolerance | 4.75 V to 5.25 V | β |
| Technology | CMOS, EEPROM-based (non-volatile) | β |
| Programmable Interface | IEEE Std. 1149.1 (JTAG) | β |
| Package Type | PLCC-84 (J-Lead, J-bend) | β |
| Mounting Type | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket compatible) |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| RoHS Status | Contains lead (pre-RoHS, SnPb finish) | Non-compliant (legacy 5V part, SnPb finish) |
| Family | β | MAX 7000 (MAX 7000E series) |
| Logic Family | β | CMOS, EEPROM-based |
| Usable Gates | β | 2,500 |
| Macrocells | β | 128 |
| Logic Array Blocks (LABs) | β | 8 |
| User I/Os | β | 84 |
| Propagation Delay (tpd1) | β | 12 ns |
| Internal Global Clock Frequency | β | 90.9 MHz |
| Setup Time | β | 4.5 ns |
| Supply Voltage (VCCINT / VCCIO) | β | 5 V (4.75 V to 5.25 V) |
| Package | β | 84-pin PLCC (J-Lead, QCCJ) |
| Programming Interface | β | JTAG (IEEE 1149.1) / ISP |
| Pin Count | β | 84 |