EPM7128EQC100-20 vs EPM7128STC100-10 Comparison
Detailed side-by-side comparison of EPM7128EQC100-20 by Altera and EPM7128STC100-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128STC100-10 - 128-Macro MAX 7000S CPLD, 10ns TQFP-100 | Intel / Altera
EPM7128STC100-10 ObsoleteSpecification Comparison
| Parameter | EPM7128EQC100-20 | EPM7128STC100-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $11.05 | $7.10 |
| Family | MAX 7000 | MAX 7000S |
| Device Type | EPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | β |
| Usable Gates | 2.5K | 2,500 |
| User I/Os | 84 | 84 |
| Logic Elements / LABs | 8 LABs (16 macrocells per LAB) | β |
| Propagation Delay (tpd) | 20 ns | β |
| Maximum Internal Frequency | 250 MHz | β |
| Technology | CMOS, UV-erasable / EEPROM | β |
| Supply Voltage | 5 V | β |
| Operating Temperature | 0 C to 90 C (Commercial) | 0C to +70C (commercial) |
| Package | 100-pin PQFP (BQFP, gull-wing) | TQFP-100 (C100) |
| Mounting Type | Surface Mount | Surface Mount |
| In-System Programming | Yes (IEEE 1149.1 JTAG) | β |
| Compliance | RoHS compliance status not confirmed in web data | β |
| Macro Cells | β | 128 |
| Logic Array Blocks | β | 8 (16 macrocells per LAB) |
| Propagation Delay (tPD) | β | 10 ns |
| Internal Counter Frequency (fCNT) | β | 100 MHz |
| Logic Family | β | CMOS |
| Supply Voltage (VCCINT) | β | 5 V |
| MultiVolt I/O Voltage | β | 3.3 V / 5 V |
| Pin Count | β | 100 |
| Programmability | β | In-System Programmable (JTAG, IEEE 1149.1), EEPROM |
| RoHS Status | β | [DATA_NEEDED: RoHS compliance status not in provided data] |