EPM7128SLC84-10 vs EPM7128SLI84-15 Comparison
Detailed side-by-side comparison of EPM7128SLC84-10 by Intel and EPM7128SLI84-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128SLC84-10
EPM7128SLC84-10 - MAX 7000 CPLD, 128 Macro, 68 I/O, 10ns | Intel
EPM7128SLC84-10 ObsoleteIntel
EPM7128SLI84-15
EPM7128SLI84-15 - 128-Macrocell CPLD, 15ns, PLCC-84 | Altera / Intel
EPM7128SLI84-15 ObsoleteSpecification Comparison
| Parameter | EPM7128SLC84-10 | EPM7128SLI84-15 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.75 | $8.40 |
| Family | MAX 7000S | MAX 7000 |
| Device Type | CPLD (Complex Programmable Logic Device) | EE PLD (CPLD) |
| Macrocells | 128 | 128 |
| Logic Gates | 2500 | β |
| User I/Os | 68 | β |
| Total Package Pins | 84 | β |
| Package | PLCC-84 (J-lead) | PLCC-84 (Plastic Leaded Chip Carrier, J-lead) |
| Propagation Delay (tpd) | 10 ns | 15 ns |
| Maximum Operating Frequency | 125 MHz | β |
| Internal Frequency | 250 MHz | β |
| Supply Voltage (VCCINT) | 5 V | 4.5 V to 5.5 V |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5 V | β |
| Program Memory Type | EEPROM (in-system programmable) | EEPROM (in-system programmable) |
| JTAG (IEEE 1149.1) | Yes | β |
| Operating Temperature | 0C to +70C (Commercial) | -40 C to +85 C (Industrial grade, 'I' suffix) |
| Mounting Type | Surface Mount (J-bend) | Surface Mount (PLCC socket compatible) |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| RoHS Status | Non-compliant (contains lead in PLCC) | [DATA_NEEDED: rohs status] |
| Series | β | EPM7128S |
| Logic Elements | β | 250 (approx.) |
| User I/O Pins | β | 84 (68 in 84-pin PLCC per some sources) |
| I/O Voltage Tolerance | β | 3.3 V or 5.0 V (configurable) |
| Process Technology | β | CMOS EEPROM |
| Pin Count | β | 84 |
| Programming Interface | β | JTAG (IEEE 1149.1) |
| Maximum User Flash Endurance | β | 100 program/erase cycles |
| Data Retention | β | 20 years |