EPM7128SLC84-15 vs EPM7096LC84-15 Comparison

Detailed side-by-side comparison of EPM7128SLC84-15 by Intel and EPM7096LC84-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128SLC84-15 EPM7096LC84-15
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $10.40 $9.85
Family MAX 7000S MAX 7000
Device Type CPLD - Complex Programmable Logic Device β€”
Macrocells 128 β€”
Usable Gates 2,500 1,800
User I/Os 68 (in 84-PLCC) β€”
Package 84-Pin PLCC (J-Lead, J84) β€”
Speed Grade -15 (15 ns pin-to-pin delay) β€”
Propagation Delay (tPD) 15 ns β€”
Maximum Internal Frequency (fMAX) 76.9 MHz β€”
Logic Family / Process CMOS, 5V, EEPROM β€”
Supply Voltage (VCCINT) 5 V β€”
I/O Standard Support 5.0 V TTL/CMOS (multi-volt I/O compatible with 3.3V) β€”
Programming Interface JTAG (IEEE Std. 1149.1), in-system programmable IEEE Std. 1149.1 JTAG
Configuration Memory Non-volatile EEPROM (instant-on, no boot PROM) β€”
Operating Temperature 0C to +70C (commercial) 0C to +70C (commercial)
RoHS Status Non-RoHS (legacy 5V part) [DATA_NEEDED: RoHS compliance status]
Mounting Type Surface Mount / Socketed (PLCC-84 socket) Surface Mount
Series β€” MAX 7000 (second-generation MAX architecture)
Macro Cells β€” 96
Logic Array Blocks (LABs) β€” 4
Pin-to-Pin Propagation Delay (tPD) β€” 15 ns
Maximum Operating Frequency β€” 76.9 MHz
User I/O Pins β€” 68 (36 per LAB, [DATA_NEEDED: exact LAB-level split])
Supply Voltage (VCC) β€” 4.75 V to 5.25 V
Programmable Type β€” EE PLD (in-system programmable via JTAG)
Package / Case β€” 84-PLCC (J-Lead)
Supplier Device Package β€” 84-PLCC (29.31 x 29.31 mm)
Data Retention β€” [DATA_NEEDED: data retention years]
Erase/Program Endurance β€” [DATA_NEEDED: erase/program cycle count]

Datasheets & Resources

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