EPM7128SLC84-6N vs EPM7128ELC84-10 Comparison
Detailed side-by-side comparison of EPM7128SLC84-6N by Intel and EPM7128ELC84-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128SLC84-6N
EPM7128SLC84-6N - MAX 7000S CPLD, 128 Macro, 6ns, 84-PLCC | Intel
EPM7128SLC84-6N β Last Time BuyIntel
EPM7128ELC84-10
EPM7128ELC84-10 - 128-Macrocell CPLD, 10ns, 5V, 84-PLCC | Intel
EPM7128ELC84-10 β ActiveSpecification Comparison
| Parameter | EPM7128SLC84-6N | EPM7128ELC84-10 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.75 | $7.20 |
| Family | MAX 7000S | MAX 7000 |
| Device System Gates | 2500 | β |
| Number of Macro Cells | 128 | β |
| Number of User I/Os | 68 | β |
| Number of Logic Blocks/Elements | 8 | β |
| Number of Global Clocks | 2 | β |
| Product Terms per Macro Cell | 32 | β |
| Maximum Operating Frequency | 147.1 MHz | β |
| Pin-to-Pin Delay (Speed Grade) | 6 ns | β |
| Supply Voltage | 5 V | β |
| Process Technology | CMOS, EEPROM | β |
| Program Memory Type | EEPROM | β |
| In-System Programmability | Yes (ISP via JTAG) | β |
| Package | 84-pin PLCC (J-lead) | 84-pin PLCC (J-Lead) |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | 0C to +70C (Commercial) |
| RoHS Status | Non-Compliant (legacy 5V part) | [DATA_NEEDED: RoHS status from datasheet] |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Macrocells | β | 128 |
| Equivalent Logic Gates | β | [DATA_NEEDED: equivalent gate count from datasheet] |
| User I/Os | β | 68 |
| Dedicated Inputs | β | 12 |
| Operating Voltage (VCCINT/VCClO) | β | 5 V |
| Pin-to-Pin Delay (tPD) | β | 10 ns |
| Counter Frequency (fCNT) | β | [DATA_NEEDED: fCNT from datasheet] |
| Mounting Type | β | Surface Mount / Socket |
| Technology | β | EEPROM-based CMOS |
| Programming Interface | β | IEEE 1149.1 (JTAG) ISP |
| In-System Programmable | β | Yes |
| Lead-Free | β | [DATA_NEEDED: lead-free status from datasheet] |