EPM7128SLI84-10N vs EPM7128SLC84-6N Comparison
Detailed side-by-side comparison of EPM7128SLI84-10N by Altera and EPM7128SLC84-6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128SLI84-10N
EPM7128SLI84-10N - MAX 7000S CPLD 128 Macro 10ns 84-PLCC | Intel / Altera
EPM7128SLI84-10N NrndIntel
EPM7128SLC84-6N
EPM7128SLC84-6N - MAX 7000S CPLD, 128 Macro, 6ns, 84-PLCC | Intel
EPM7128SLC84-6N β Last Time BuySpecification Comparison
| Parameter | EPM7128SLI84-10N | EPM7128SLC84-6N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.45 | $8.75 |
| Family | MAX 7000S | MAX 7000S |
| Logic Cells / Macro Cells | 128 macro cells | β |
| Usable Gates | 2,500 | β |
| Number of Logic Elements / Blocks | 16 Logic Array Blocks (LABs) | β |
| User I/Os | 68 | β |
| Propagation Delay (tPD) | 10 ns | β |
| Maximum Frequency (fMAX) | 125 MHz | β |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5 V typical) | β |
| I/O Voltage Tolerance | 3.3 V / 5 V MultiVolt I/O | β |
| Process Technology | CMOS EEPROM | CMOS, EEPROM |
| Programmability | In-system programmable (ISP), non-volatile EEPROM | β |
| Boundary-Scan (JTAG) | IEEE Std 1149.1 compliant | β |
| Package | 84-pin PLCC (J-Lead) | 84-pin PLCC (J-lead) |
| Mounting Type | Surface Mount | β |
| Operating Temperature | -40 C to +85 C (Industrial) | [DATA_NEEDED: operating temperature range] |
| RoHS Status | [DATA_NEEDED: RoHS compliance per latest Intel/Altera declaration] | Non-Compliant (legacy 5V part) |
| Lead-Free | [DATA_NEEDED: lead-free per latest Intel/Altera declaration] | β |
| Device System Gates | β | 2500 |
| Number of Macro Cells | β | 128 |
| Number of User I/Os | β | 68 |
| Number of Logic Blocks/Elements | β | 8 |
| Number of Global Clocks | β | 2 |
| Product Terms per Macro Cell | β | 32 |
| Maximum Operating Frequency | β | 147.1 MHz |
| Pin-to-Pin Delay (Speed Grade) | β | 6 ns |
| Supply Voltage | β | 5 V |
| Program Memory Type | β | EEPROM |
| In-System Programmability | β | Yes (ISP via JTAG) |