EPM7128SQC100-10N vs EPM7128BTC100-10 Comparison
Detailed side-by-side comparison of EPM7128SQC100-10N by Altera and EPM7128BTC100-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128BTC100-10 - MAX 7000B CPLD, 128 Macrocells, 10ns | Intel
EPM7128BTC100-10 β Last Time BuySpecification Comparison
| Parameter | EPM7128SQC100-10N | EPM7128BTC100-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $14.95 | $11.20 |
| Family | MAX 7000 | MAX 7000B |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Macro Cells | 128 | β |
| Usable Gates | 2,500 | 2.5K |
| Logic Array Blocks (LABs) | 8 (16 macro cells each) | 8 (16 macrocells each) |
| User I/O Pins | 84 | β |
| Propagation Delay (tPD) | 10 ns | β |
| Maximum Frequency | 100 MHz | β |
| Supply Voltage (VCCINT) | 5 V (4.75 V to 5.25 V) | β |
| I/O Voltage Tolerance | 3.3 V or 5 V (MultiVolt interface) | β |
| Package | 100-pin PQFP (BQFP) | TQFP-100 |
| Configuration Memory | EEPROM (non-volatile) | β |
| Programming Interface | JTAG (IEEE Std 1149.1), 4-pin | JTAG (IEEE 1149.1) / ISP |
| Operating Temperature | -40C to +85C (industrial) | 0C to +70C (commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| Lead-Free / RoHS Status | Lead-free (N suffix) | β |
| Architecture Generation | Second-generation MAX | β |
| Macrocells | β | 128 |
| User I/Os | β | 84 |
| Pin-to-Pin Delay (tPD) | β | 10 ns |
| Maximum Frequency (fCNT) | β | 125 MHz |
| Core Voltage (VCCINT) | β | 2.5 V |
| I/O Voltage (VCCIO) | β | 3.3 V (5V tolerant inputs) |
| RoHS Status | β | Compliant (lead-free) |
| Technology | β | CMOS EEPROM |