EPM7128STC100-10 vs EPM7128STC100-6 Comparison

Detailed side-by-side comparison of EPM7128STC100-10 by Altera and EPM7128STC100-6 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM7128STC100-10

EPM7128STC100-10 - 128-Macro MAX 7000S CPLD, 10ns TQFP-100 | Intel / Altera

EPM7128STC100-10 Obsolete
Intel
EPM7128STC100-6

EPM7128STC100-6 - MAX 7000S CPLD 128-Macrocell 6ns | Intel

EPM7128STC100-6 Nrnd

Specification Comparison

Parameter EPM7128STC100-10 EPM7128STC100-6
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $7.10 $5.20
Family MAX 7000S MAX 7000S
Device Type CPLD (Complex Programmable Logic Device) β€”
Macro Cells 128 β€”
Usable Gates 2,500 β€”
User I/Os 84 β€”
Logic Array Blocks 8 (16 macrocells per LAB) β€”
Propagation Delay (tPD) 10 ns β€”
Internal Counter Frequency (fCNT) 100 MHz β€”
Logic Family CMOS β€”
Supply Voltage (VCCINT) 5 V β€”
MultiVolt I/O Voltage 3.3 V / 5 V β€”
Package TQFP-100 (C100) 100-pin TQFP (STC100)
Pin Count 100 β€”
Mounting Type Surface Mount Surface Mount
Programmability In-System Programmable (JTAG, IEEE 1149.1), EEPROM β€”
Operating Temperature 0C to +70C (commercial) 0C to +70C (commercial)
RoHS Status [DATA_NEEDED: RoHS compliance status not in provided data] β€”
Macrocells β€” 128
Equivalent Gates β€” 2,500
User I/O Pins β€” 84
Pin-to-Pin Delay (tPD) β€” 6 ns
Maximum Internal Frequency (fCNT) β€” 147.1 MHz
Supply Voltage (VCCINT / VCCIO) β€” 5 V
Programming Interface β€” JTAG (IEEE Std. 1149.1) / ISP
PCI Compliance β€” 33 MHz PCI Local Bus Rev. 2.2 (-6/-7/-10 grades)
Lead Pitch β€” 1.0 mm (TQFP)
Lead-Free / RoHS β€” Contains lead (non-RoHS original; -6N variant is lead-free)
Configuration Memory β€” On-chip EEPROM (non-volatile)

Datasheets & Resources

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