EPM7128STC100-10 vs EPM7128STC100-7 Comparison

Detailed side-by-side comparison of EPM7128STC100-10 by Altera and EPM7128STC100-7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM7128STC100-10

EPM7128STC100-10 - 128-Macro MAX 7000S CPLD, 10ns TQFP-100 | Intel / Altera

EPM7128STC100-10 Obsolete
Intel
EPM7128STC100-7

EPM7128STC100-7 - MAX 7000S CPLD, 128 Macro, 7.5ns, TQFP-100 | Intel

EPM7128STC100-7 Obsolete

Specification Comparison

Parameter EPM7128STC100-10 EPM7128STC100-7
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $7.10 $8.20
Family MAX 7000S β€”
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 128 128
Usable Gates 2,500 2,500
User I/Os 84 84
Logic Array Blocks 8 (16 macrocells per LAB) β€”
Propagation Delay (tPD) 10 ns 7.5 ns
Internal Counter Frequency (fCNT) 100 MHz β€”
Logic Family CMOS CMOS
Supply Voltage (VCCINT) 5 V 5 V
MultiVolt I/O Voltage 3.3 V / 5 V β€”
Package TQFP-100 (C100) 100-Pin TQFP (TQFP-100)
Pin Count 100 β€”
Mounting Type Surface Mount Surface Mount
Programmability In-System Programmable (JTAG, IEEE 1149.1), EEPROM β€”
Operating Temperature 0C to +70C (commercial) 0C to +70C (Commercial)
RoHS Status [DATA_NEEDED: RoHS compliance status not in provided data] [DATA_NEEDED: rohs status]
Series β€” MAX 7000S
Logic Array Blocks (LABs) β€” 8
Internal Frequency β€” 125 MHz
Programmable Pin Count β€” 100
In-System Programmability β€” Yes (JTAG IEEE 1149.1)
Configuration Memory β€” EEPROM (non-volatile)

Datasheets & Resources

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