EPM7128STC100-10N vs EPM7128AETC100-5N Comparison
Detailed side-by-side comparison of EPM7128STC100-10N by Altera and EPM7128AETC100-5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128STC100-10N
EPM7128STC100-10N - MAX 7000S CPLD 128-Macrocell 10ns TQFP-100 | Altera
EPM7128STC100-10N NrndIntel
EPM7128AETC100-5N
EPM7128AETC100-5N - 128-Macrocell MAX 7000A CPLD, 5ns | Intel / Altera
EPM7128AETC100-5N β ActiveSpecification Comparison
| Parameter | EPM7128STC100-10N | EPM7128AETC100-5N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.30 | $6.85 |
| Family | MAX 7000S | MAX 7000A |
| Product Type | CPLD - Complex Programmable Logic Device | β |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | β |
| Logic Array Blocks (LABs) | 8 (16 macrocells each) | β |
| User I/Os | 84 | 84 |
| Propagation Delay (tPD) | 10 ns | β |
| Internal Frequency (fMAX) | 100 MHz | β |
| Supply Voltage (VCCINT) | 5 V | β |
| I/O Voltage (VCCIO) | 3.3 V or 5 V (MultiVolt) | β |
| Process Technology | CMOS EEPROM | β |
| Package | 100-pin TQFP (14 x 14 x 1 mm) | 100-pin TQFP |
| Operating Temperature | 0 C to +70 C (commercial) | 0C to +70C (commercial) |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Compliant (Pb-free "N" suffix) | Compliant |
| Lead-Free | Yes | β |
| Device Type | β | CPLD - Complex Programmable Logic Device |
| Logic Gates (typical) | β | 2,500 |
| Pin-to-Pin Logic Delay (tPD) | β | 5 ns |
| Maximum Operating Frequency | β | 192.3 MHz |
| Core Supply Voltage (VCCINT) | β | 3.3 V |
| I/O Bank Supply Voltage (VCCIO) | β | 3.3 V or 2.5 V |
| 5V Tolerant Inputs | β | Yes (when VCCIO = 3.3 V) |
| Programmable Logic Type | β | EEPROM-based, in-system programmable |
| Programming Interface | β | JTAG (IEEE Std. 1149.1) |