EPM7128STC100-15N vs EPM7128STC100-6 Comparison
Detailed side-by-side comparison of EPM7128STC100-15N by Intel and EPM7128STC100-6 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7128STC100-15N
EPM7128STC100-15N - 128-Macro Cell CPLD, 15ns, 100-TQFP | Intel / Altera
EPM7128STC100-15N ObsoleteIntel
EPM7128STC100-6
EPM7128STC100-6 - MAX 7000S CPLD 128-Macrocell 6ns | Intel
EPM7128STC100-6 NrndSpecification Comparison
| Parameter | EPM7128STC100-15N | EPM7128STC100-6 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.20 | $5.20 |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Family | MAX 7000S | MAX 7000S |
| Usable Gates | 2,500 | β |
| Macro Cells | 128 | β |
| Logic Array Blocks (LABs) | 8 (16 macro cells each) | β |
| Maximum User I/O | 84 | β |
| Pin-to-Pin Logic Delay (tPD) | 15 ns (-15 speed grade) | β |
| Maximum Internal Frequency | 76.9 MHz | β |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | β |
| Supply Voltage (VCCIO) | 3.3 V or 5 V (per bank) | β |
| Technology | CMOS EEPROM, in-system programmable | β |
| Package | 100-pin TQFP | 100-pin TQFP (STC100) |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| JTAG (IEEE 1149.1) | Yes - in-system programming | β |
| Output Options | Totem-pole or open-drain (per pin) | β |
| Dedicated Inputs | 4 global inputs | β |
| RoHS Status | Non-RoHS (legacy SnPb finish typical) | β |
| Lifecycle Status | Obsolete (PDN effective 2017-06-01) | β |
| Macrocells | β | 128 |
| Equivalent Gates | β | 2,500 |
| User I/O Pins | β | 84 |
| Pin-to-Pin Delay (tPD) | β | 6 ns |
| Maximum Internal Frequency (fCNT) | β | 147.1 MHz |
| Supply Voltage (VCCINT / VCCIO) | β | 5 V |
| Mounting Type | β | Surface Mount |
| Programming Interface | β | JTAG (IEEE Std. 1149.1) / ISP |
| PCI Compliance | β | 33 MHz PCI Local Bus Rev. 2.2 (-6/-7/-10 grades) |
| Lead Pitch | β | 1.0 mm (TQFP) |
| Lead-Free / RoHS | β | Contains lead (non-RoHS original; -6N variant is lead-free) |
| Configuration Memory | β | On-chip EEPROM (non-volatile) |