EPM7128STC100-6 vs EPM7128STC100-6N Comparison
Detailed side-by-side comparison of EPM7128STC100-6 by Intel and EPM7128STC100-6N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128STC100-6N - MAX 7000S 128-Macro-Cell CPLD | Altera | TQFP-100
EPM7128STC100-6N ObsoleteSpecification Comparison
| Parameter | EPM7128STC100-6 | EPM7128STC100-6N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $5.20 | $10.50 |
| Family | MAX 7000S | MAX 7000S |
| Macrocells | 128 | β |
| Equivalent Gates | 2,500 | β |
| User I/O Pins | 84 | β |
| Pin-to-Pin Delay (tPD) | 6 ns | β |
| Maximum Internal Frequency (fCNT) | 147.1 MHz | β |
| Supply Voltage (VCCINT / VCCIO) | 5 V | β |
| Package | 100-pin TQFP (STC100) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE Std. 1149.1) / ISP | β |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| PCI Compliance | 33 MHz PCI Local Bus Rev. 2.2 (-6/-7/-10 grades) | β |
| Lead Pitch | 1.0 mm (TQFP) | β |
| Lead-Free / RoHS | Contains lead (non-RoHS original; -6N variant is lead-free) | β |
| Configuration Memory | On-chip EEPROM (non-volatile) | β |
| Usable Gates | β | 2,500 |
| Macro Cells | β | 128 |
| User I/Os | β | 84 |
| Logic Family | β | CMOS |
| Number of Pins | β | 100 |
| Package Type | β | TQFP-100 |
| Maximum Internal Frequency | β | 147.1 MHz |
| Internal Counter Frequency | β | 250 MHz |
| Propagation Delay (tPD) | β | 6 ns |
| Pin-to-Pin Delay | β | 4.5 ns |
| Supply Voltage (VCCIO) | β | 5 V |
| Process Technology | β | CMOS EEPROM |
| Programmability | β | In-System Programmable (ISP) via JTAG |
| JTAG Support | β | IEEE 1149.1 Boundary Scan |
| RoHS Status | β | Non-Compliant (lead-bearing package) |