EPM7128STC100-6N vs EPM7128SQC100-7N Comparison

Detailed side-by-side comparison of EPM7128STC100-6N by Altera and EPM7128SQC100-7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7128STC100-6N EPM7128SQC100-7N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $10.50 $7.10
Family MAX 7000S MAX 7000S
Usable Gates 2,500 2,500
Macro Cells 128 β€”
User I/Os 84 β€”
Logic Family CMOS β€”
Number of Pins 100 β€”
Package Type TQFP-100 β€”
Maximum Internal Frequency 147.1 MHz β€”
Internal Counter Frequency 250 MHz β€”
Propagation Delay (tPD) 6 ns β€”
Pin-to-Pin Delay 4.5 ns β€”
Supply Voltage (VCCIO) 5 V β€”
Process Technology CMOS EEPROM 0.30 Β΅m CMOS EEPROM
Programmability In-System Programmable (ISP) via JTAG β€”
JTAG Support IEEE 1149.1 Boundary Scan β€”
Operating Temperature 0C to +70C (Commercial) 0C to +70C (commercial)
Mounting Type Surface Mount β€”
RoHS Status Non-Compliant (lead-bearing package) Compliant (lead-free 'N' suffix)
Device Type β€” CPLD - Complex Programmable Logic Device
Program Memory Type β€” EEPROM
Number of Macrocells β€” 128
Number of Logic Array Blocks β€” 8
Number of Global Clocks β€” 2
Product Terms per Macrocell β€” 32
System Gates β€” 5,000 (max)
Maximum User I/Os β€” 84
Pin-to-Pin Delay (tPD) β€” 7.5 ns
Counter Speed β€” 175.4 MHz
In-System Programmability β€” Yes (IEEE 1149.1 JTAG)
Operating Voltage (Core) β€” 5.0 V
I/O Standard Support β€” multiVolt (2.5V, 3.3V, 5.0V)
Package β€” 100-pin PQFP (QFP-100)
Security Bit β€” Programmable (one per device)

Datasheets & Resources

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