EPM7128STC100-6N vs EPM7128STC100-6 Comparison
Detailed side-by-side comparison of EPM7128STC100-6N by Altera and EPM7128STC100-6 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128STC100-6N - MAX 7000S 128-Macro-Cell CPLD | Altera | TQFP-100
EPM7128STC100-6N ObsoleteSpecification Comparison
| Parameter | EPM7128STC100-6N | EPM7128STC100-6 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.50 | $5.20 |
| Family | MAX 7000S | MAX 7000S |
| Usable Gates | 2,500 | β |
| Macro Cells | 128 | β |
| User I/Os | 84 | β |
| Logic Family | CMOS | β |
| Number of Pins | 100 | β |
| Package Type | TQFP-100 | β |
| Maximum Internal Frequency | 147.1 MHz | β |
| Internal Counter Frequency | 250 MHz | β |
| Propagation Delay (tPD) | 6 ns | β |
| Pin-to-Pin Delay | 4.5 ns | β |
| Supply Voltage (VCCIO) | 5 V | β |
| Process Technology | CMOS EEPROM | β |
| Programmability | In-System Programmable (ISP) via JTAG | β |
| JTAG Support | IEEE 1149.1 Boundary Scan | β |
| Operating Temperature | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Non-Compliant (lead-bearing package) | β |
| Macrocells | β | 128 |
| Equivalent Gates | β | 2,500 |
| User I/O Pins | β | 84 |
| Pin-to-Pin Delay (tPD) | β | 6 ns |
| Maximum Internal Frequency (fCNT) | β | 147.1 MHz |
| Supply Voltage (VCCINT / VCCIO) | β | 5 V |
| Package | β | 100-pin TQFP (STC100) |
| Programming Interface | β | JTAG (IEEE Std. 1149.1) / ISP |
| PCI Compliance | β | 33 MHz PCI Local Bus Rev. 2.2 (-6/-7/-10 grades) |
| Lead Pitch | β | 1.0 mm (TQFP) |
| Lead-Free / RoHS | β | Contains lead (non-RoHS original; -6N variant is lead-free) |
| Configuration Memory | β | On-chip EEPROM (non-volatile) |