EPM7128STI100-10N vs EPM7128STC100-10N Comparison
Detailed side-by-side comparison of EPM7128STI100-10N by Altera and EPM7128STC100-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128STI100-10N - 128-Macrocell CPLD, 10ns, 100-pin TQFP | Altera
EPM7128STI100-10N ObsoleteAltera
EPM7128STC100-10N - MAX 7000S CPLD 128-Macrocell 10ns TQFP-100 | Altera
EPM7128STC100-10N NrndSpecification Comparison
| Parameter | EPM7128STI100-10N | EPM7128STC100-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.85 | $9.30 |
| Family | MAX 7000S | MAX 7000S |
| Architecture | CMOS EEPROM-based CPLD | β |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 (up to 5,000 family max) | 2,500 |
| Logic Array Blocks (LABs) | 8 | 8 (16 macrocells each) |
| Maximum User I/O | 84 | β |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | β |
| Maximum Counter Frequency | 175.4 MHz | β |
| Supply Voltage (VCC) | 5 V | β |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | Yes (IEEE 1149.1 JTAG) |
| JTAG Boundary-Scan | Yes (BST) | β |
| Package | 100-pin TQFP | 100-pin TQFP (14 x 14 x 1 mm) |
| Operating Temperature | -40C to +85C (Industrial) | 0 C to +70 C (commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant (Pb-free "N" suffix) |
| Open-Drain I/O Option | Available (per MAX 7000A feature set) | β |
| Product Type | β | CPLD - Complex Programmable Logic Device |
| User I/Os | β | 84 |
| Propagation Delay (tPD) | β | 10 ns |
| Internal Frequency (fMAX) | β | 100 MHz |
| Supply Voltage (VCCINT) | β | 5 V |
| I/O Voltage (VCCIO) | β | 3.3 V or 5 V (MultiVolt) |
| Process Technology | β | CMOS EEPROM |
| Lead-Free | β | Yes |