EPM7160ELC84-12 vs EPM7160SLC84-15 Comparison

Detailed side-by-side comparison of EPM7160ELC84-12 by Altera and EPM7160SLC84-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM7160ELC84-12 EPM7160ELC84-12 - MAX 7000 CPLD, 160 Macrocells, 12ns | Altera

EPM7160ELC84-12 - MAX 7000 CPLD, 160 Macrocells, 12ns | Altera

EPM7160ELC84-12 ⚠ Last Time Buy

Specification Comparison

Parameter EPM7160ELC84-12 EPM7160SLC84-15
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $11.10 $10.80
Manufacturer Altera (Intel PSG) β€”
Series MAX 7000 (MAX 7000E) β€”
Programmable Type EE PLD (EEPROM) β€”
Number of Macrocells 160 β€”
Number of Logic Array Blocks (LABs) 4 β€”
Number of Usable Gates 3,200 β€”
Number of I/O (max) 68 β€”
Number of I/O (per package) 64 β€”
Propagation Delay tpd(1) max 12 ns β€”
Counter Frequency (max) 90.9 MHz β€”
Voltage Supply - Internal 4.75 V to 5.25 V (5 V nominal) β€”
Operating Temperature 0C to +70C (commercial) 0 C to 70 C
Package / Case 84-LCC (J-Lead) β€”
Supplier Device Package 84-PLCC (29.31 x 29.31 mm) β€”
Mounting Type Surface Mount Surface Mount (PLCC socket or direct solder)
In-System Programmability Yes (IEEE 1149.1 JTAG) β€”
RoHS Status [DATA_NEEDED: RoHS status] Not RoHS compliant (contains lead, SnPb finish typical)
Family β€” MAX 7000
Macrocells β€” 160
Usable Gates β€” 3,200
Maximum Propagation Delay β€” 15 ns
Maximum User I/O Pins β€” 64
Supply Voltage (VCCINT/VCIO) β€” 4.75 V to 5.25 V (5 V nominal)
I/O Logic Level β€” Configurable 3.3 V or 5 V
Technology β€” CMOS, EEPROM configuration
Package Type β€” PLCC-84 (PQCC84, JEDEC S-PQCC-J84)
Terminal Pitch β€” 1.270 mm
Programming Interface β€” JTAG (IEEE 1149.1) in-system programmable
Lifecycle β€” Obsolete / last-time-buy (per Altera/Intel PDN)

Datasheets & Resources

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