EPM7160SLC84-10N vs EPM7160ELC84-12 Comparison
Detailed side-by-side comparison of EPM7160SLC84-10N by Intel and EPM7160ELC84-12 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7160SLC84-10N
EPM7160SLC84-10N - MAX 7000S CPLD 160 Macrocells 84-PLCC | Intel
EPM7160SLC84-10N ObsoleteAltera
EPM7160ELC84-12
EPM7160ELC84-12 - MAX 7000 CPLD, 160 Macrocells, 12ns | Altera
EPM7160ELC84-12 β Last Time BuySpecification Comparison
| Parameter | EPM7160SLC84-10N | EPM7160ELC84-12 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.85 | $11.10 |
| Family | MAX 7000S | β |
| Logic Elements / Macrocells | 160 macrocells | β |
| Usable Gates | 3,200 gates | β |
| Logic Array Blocks (LABs) | 4 | β |
| User I/O Pins | 64 (also reported as 60 or 36 depending on variant) | β |
| Pin-to-Pin Delay (tPD) | 10 ns | β |
| Counter Speed (fCNT) | up to 175.4 MHz | β |
| Maximum Operating Frequency | 100 MHz | β |
| Supply Voltage - Core (VCC) | 5.0 V | β |
| I/O Supply Voltage (VCCIO) | 3.3 V or 5.0 V | β |
| Configuration Memory | EEPROM (non-volatile) | β |
| In-System Programming | Yes, via IEEE Std. 1149.1 JTAG | β |
| Program / Erase Cycles | 100 minimum | β |
| Data Retention | 20 years minimum | β |
| Package | 84-pin PLCC (J-lead, surface mount) | β |
| Operating Temperature Grade | Commercial (0C to +70C) | β |
| Lead-Free / RoHS | Yes (-N suffix indicates lead-free) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Manufacturer | β | Altera (Intel PSG) |
| Series | β | MAX 7000 (MAX 7000E) |
| Programmable Type | β | EE PLD (EEPROM) |
| Number of Macrocells | β | 160 |
| Number of Logic Array Blocks (LABs) | β | 4 |
| Number of Usable Gates | β | 3,200 |
| Number of I/O (max) | β | 68 |
| Number of I/O (per package) | β | 64 |
| Propagation Delay tpd(1) max | β | 12 ns |
| Counter Frequency (max) | β | 90.9 MHz |
| Voltage Supply - Internal | β | 4.75 V to 5.25 V (5 V nominal) |
| Operating Temperature | β | 0C to +70C (commercial) |
| Package / Case | β | 84-LCC (J-Lead) |
| Supplier Device Package | β | 84-PLCC (29.31 x 29.31 mm) |
| In-System Programmability | β | Yes (IEEE 1149.1 JTAG) |
| RoHS Status | β | [DATA_NEEDED: RoHS status] |