EPM7160SLC84-10N vs EPM7160SLC84-10 Comparison
Detailed side-by-side comparison of EPM7160SLC84-10N by Intel and EPM7160SLC84-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7160SLC84-10N | EPM7160SLC84-10 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.85 | $35.77 |
| Family | MAX 7000S | MAX 7000S |
| Logic Elements / Macrocells | 160 macrocells | β |
| Usable Gates | 3,200 gates | 3,200 |
| Logic Array Blocks (LABs) | 4 | 4 |
| User I/O Pins | 64 (also reported as 60 or 36 depending on variant) | β |
| Pin-to-Pin Delay (tPD) | 10 ns | β |
| Counter Speed (fCNT) | up to 175.4 MHz | β |
| Maximum Operating Frequency | 100 MHz | 100 MHz |
| Supply Voltage - Core (VCC) | 5.0 V | β |
| I/O Supply Voltage (VCCIO) | 3.3 V or 5.0 V | β |
| Configuration Memory | EEPROM (non-volatile) | β |
| In-System Programming | Yes, via IEEE Std. 1149.1 JTAG | β |
| Program / Erase Cycles | 100 minimum | β |
| Data Retention | 20 years minimum | β |
| Package | 84-pin PLCC (J-lead, surface mount) | 84-Pin PLCC (J-Lead) |
| Operating Temperature Grade | Commercial (0C to +70C) | β |
| Lead-Free / RoHS | Yes (-N suffix indicates lead-free) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Macrocells | β | 160 |
| Maximum User I/O Pins | β | 64 |
| Propagation Delay (tPD) | β | 10 ns |
| Supply Voltage (VCCINT/VCCIO) | β | 5.0 V |
| In-System Programmability | β | Yes (IEEE 1149.1 JTAG, 5.0 V) |
| Technology | β | EEPROM-based CMOS |
| Operating Temperature | β | 0C to +70C (Commercial) |
| JTAG Boundary Scan | β | Yes (IEEE Std. 1149.1 compliant) |
| RoHS Status | β | [DATA_NEEDED: RoHS status] |