EPM7160SLC84-15 vs EPM7160ELC84-12 Comparison

Detailed side-by-side comparison of EPM7160SLC84-15 by Altera and EPM7160ELC84-12 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM7160ELC84-12 EPM7160ELC84-12 - MAX 7000 CPLD, 160 Macrocells, 12ns | Altera

EPM7160ELC84-12 - MAX 7000 CPLD, 160 Macrocells, 12ns | Altera

EPM7160ELC84-12 ⚠ Last Time Buy

Specification Comparison

Parameter EPM7160SLC84-15 EPM7160ELC84-12
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $10.80 $11.10
Family MAX 7000 β€”
Macrocells 160 β€”
Usable Gates 3,200 β€”
Maximum Propagation Delay 15 ns β€”
Maximum User I/O Pins 64 β€”
Supply Voltage (VCCINT/VCIO) 4.75 V to 5.25 V (5 V nominal) β€”
I/O Logic Level Configurable 3.3 V or 5 V β€”
Technology CMOS, EEPROM configuration β€”
Package Type PLCC-84 (PQCC84, JEDEC S-PQCC-J84) β€”
Terminal Pitch 1.270 mm β€”
Mounting Type Surface Mount (PLCC socket or direct solder) Surface Mount
Operating Temperature 0 C to 70 C 0C to +70C (commercial)
Programming Interface JTAG (IEEE 1149.1) in-system programmable β€”
RoHS Status Not RoHS compliant (contains lead, SnPb finish typical) [DATA_NEEDED: RoHS status]
Lifecycle Obsolete / last-time-buy (per Altera/Intel PDN) β€”
Manufacturer β€” Altera (Intel PSG)
Series β€” MAX 7000 (MAX 7000E)
Programmable Type β€” EE PLD (EEPROM)
Number of Macrocells β€” 160
Number of Logic Array Blocks (LABs) β€” 4
Number of Usable Gates β€” 3,200
Number of I/O (max) β€” 68
Number of I/O (per package) β€” 64
Propagation Delay tpd(1) max β€” 12 ns
Counter Frequency (max) β€” 90.9 MHz
Voltage Supply - Internal β€” 4.75 V to 5.25 V (5 V nominal)
Package / Case β€” 84-LCC (J-Lead)
Supplier Device Package β€” 84-PLCC (29.31 x 29.31 mm)
In-System Programmability β€” Yes (IEEE 1149.1 JTAG)

Datasheets & Resources

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