EPM7160SQC160-10 vs EPM7160SQC160-7 Comparison
Detailed side-by-side comparison of EPM7160SQC160-10 by Altera and EPM7160SQC160-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7160SQC160-10 - MAX 7000S CPLD, 160 Macro Cells, 100MHz, PQFP-160 | Intel / Altera
EPM7160SQC160-10 ObsoleteSpecification Comparison
| Parameter | EPM7160SQC160-10 | EPM7160SQC160-7 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $12.20 | $9.75 |
| Family | MAX 7000S | MAX 7000S |
| Macro Cells | 160 | β |
| Logic Elements / Gates | 3,200 usable gates | β |
| User I/Os | 104 | β |
| Logic Array Blocks (LABs) | 10 | 10 |
| Maximum Operating Frequency | 100 MHz | β |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | β |
| Supply Voltage (VCCINT) | 5.0 V | 4.75 V to 5.25 V (5.0 V nominal) |
| I/O Voltage Tolerance | 5.0 V | β |
| Programming Technology | EEPROM, in-system programmable | β |
| JTAG Support | IEEE 1149.1 (boundary-scan + ISP) | β |
| Package | PQFP-160 (SQC160) | 160-pin PQFP (BQFP, 28x28 mm) |
| Operating Temperature | 0 C to +70 C (commercial) | 0 Β°C to 70 Β°C (commercial) |
| Logic Family | CMOS | β |
| Mounting Type | Surface Mount | Surface Mount |
| Process Technology | CMOS, EEPROM-based | β |
| RoHS Status | unknown | Not Compliant (per Arrow listing) |
| Lead-Free | unknown | β |
| Macrocells | β | 160 |
| Usable System Gates | β | 3,200 |
| Product Terms per Macrocell | β | 32 |
| Maximum User I/Os | β | 104 |
| Global Clocks | β | 2 |
| Speed Grade | β | -7 (7.5 ns pin-to-pin) |
| Maximum Propagation Delay (tPD) | β | 7.5 ns |
| Program Memory Type | β | EEPROM (in-system programmable) |
| JTAG (IEEE 1149.1) | β | Yes (ISP via JTAG) |
| PCI Compliance | β | PCI Local Bus Specification Revision 2.2 |
| Part Status | β | Obsolete |