EPM7160SQC160-6 vs EPM7160SQC160-7 Comparison
Detailed side-by-side comparison of EPM7160SQC160-6 by Altera and EPM7160SQC160-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7160SQC160-6 - 160-Macrocell MAX 7000S CPLD, 6ns, PQFP-160 | Altera
EPM7160SQC160-6 ObsoleteSpecification Comparison
| Parameter | EPM7160SQC160-6 | EPM7160SQC160-7 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $5.45 | $9.75 |
| Series | MAX 7000S | β |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Programmable Type | In System Programmable (ISP), EEPROM-based | β |
| Number of Macrocells | 160 | β |
| Number of Logic Elements/Blocks | 10 LABs (Logic Array Blocks) | β |
| Number of Usable Gates | 3,200 | β |
| Number of I/O Pins | 104 | β |
| Propagation Delay (tpd) | 6 ns (max, pin-to-pin) | β |
| Maximum Internal Frequency | 167 MHz | β |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (nominal 5 V) | 4.75 V to 5.25 V (5.0 V nominal) |
| Logic Family | CMOS, TTL-compatible I/O | β |
| Operating Temperature | 0 C to 70 C (commercial) | 0 Β°C to 70 Β°C (commercial) |
| Program/Erase Endurance | 100 cycles (EEPROM) | β |
| JTAG / Boundary Scan | IEEE Std 1149.1 compliant | β |
| Package | 160-pin PQFP (Plastic Quad Flat Pack), 28x28 mm body | 160-pin PQFP (BQFP, 28x28 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| Dedicated Input Pins | 4 (GCLK1, GCLRn, OE1, OE2/GCLK2) | β |
| Family | β | MAX 7000S |
| Macrocells | β | 160 |
| Logic Array Blocks (LABs) | β | 10 |
| Usable System Gates | β | 3,200 |
| Product Terms per Macrocell | β | 32 |
| Maximum User I/Os | β | 104 |
| Global Clocks | β | 2 |
| Speed Grade | β | -7 (7.5 ns pin-to-pin) |
| Maximum Propagation Delay (tPD) | β | 7.5 ns |
| Program Memory Type | β | EEPROM (in-system programmable) |
| JTAG (IEEE 1149.1) | β | Yes (ISP via JTAG) |
| PCI Compliance | β | PCI Local Bus Specification Revision 2.2 |
| RoHS Status | β | Not Compliant (per Arrow listing) |
| Part Status | β | Obsolete |