EPM7160STC100-10F vs EPM7128STC100-10 Comparison
Detailed side-by-side comparison of EPM7160STC100-10F by Intel and EPM7128STC100-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7160STC100-10F
EPM7160STC100-10F - 160-Macrocell MAX 7000S CPLD, 10ns, TQFP-100
EPM7160STC100-10F β ActiveAltera
EPM7128STC100-10
EPM7128STC100-10 - 128-Macro MAX 7000S CPLD, 10ns TQFP-100 | Intel / Altera
EPM7128STC100-10 ObsoleteSpecification Comparison
| Parameter | EPM7160STC100-10F | EPM7128STC100-10 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.95 | $7.10 |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 160 | β |
| Usable Gates | 3,200 | 2,500 |
| Maximum User I/O Pins | 84 | β |
| Dedicated Inputs | 4 | β |
| Propagation Delay (tPD) | 10 ns | 10 ns |
| Maximum Frequency (fMAX) | 100 MHz | β |
| Supply Voltage (VCCINT) | 5.0 V | 5 V |
| Process Technology | CMOS, EEPROM-based | β |
| Programmability | In-System Programmable (ISP) via JTAG (IEEE 1149.1) | In-System Programmable (JTAG, IEEE 1149.1), EEPROM |
| Package | 100-pin TQFP (1.0 mm height, lead-free) | TQFP-100 (C100) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0 Β°C to +70 Β°C (commercial) | 0C to +70C (commercial) |
| RoHS Status | Lead-free (suffix F indicates Pb-free) | [DATA_NEEDED: RoHS compliance status not in provided data] |
| Macro Cells | β | 128 |
| User I/Os | β | 84 |
| Logic Array Blocks | β | 8 (16 macrocells per LAB) |
| Internal Counter Frequency (fCNT) | β | 100 MHz |
| Logic Family | β | CMOS |
| MultiVolt I/O Voltage | β | 3.3 V / 5 V |
| Pin Count | β | 100 |