EPM7160STC100-10N vs EPM7128STC100-10N Comparison

Detailed side-by-side comparison of EPM7160STC100-10N by Altera and EPM7128STC100-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM7160STC100-10N

EPM7160STC100-10N - MAX 7000 CPLD, 160 Macrocells, TQFP-100 | Altera

EPM7160STC100-10N Obsolete
Altera
EPM7128STC100-10N

EPM7128STC100-10N - MAX 7000S CPLD 128-Macrocell 10ns TQFP-100 | Altera

EPM7128STC100-10N Nrnd

Specification Comparison

Parameter EPM7160STC100-10N EPM7128STC100-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $15.95 $9.30
Family MAX 7000S MAX 7000S
Macrocells 160 128
User I/Os 84 84
Equivalent Gates 3.2K β€”
Propagation Delay (tPD) 10 ns 10 ns
Internal Operating Frequency 167 MHz max β€”
Supply Voltage (VCCINT) 4.75 V to 5.25 V 5 V
I/O Voltage (VCCIO) 3.0 V to 5.25 V (MultiVolt) 3.3 V or 5 V (MultiVolt)
Logic Family CMOS β€”
Programmable Type In-System Programmable (ISP) via JTAG β€”
Configuration Memory EEPROM (non-volatile) β€”
Package TQFP-100 (1 mm height, plastic) 100-pin TQFP (14 x 14 x 1 mm)
Operating Temperature 0C to +70C (Commercial) 0 C to +70 C (commercial)
Mounting Type Surface Mount Surface Mount
JTAG (IEEE 1149.1) Yes β€”
PCI Compliance Yes (66 MHz) β€”
RoHS Status [DATA_NEEDED: RoHS status] Compliant (Pb-free "N" suffix)
MSL Level [DATA_NEEDED: MSL level] β€”
Product Type β€” CPLD - Complex Programmable Logic Device
Usable Gates β€” 2,500
Logic Array Blocks (LABs) β€” 8 (16 macrocells each)
Internal Frequency (fMAX) β€” 100 MHz
Process Technology β€” CMOS EEPROM
In-System Programmability β€” Yes (IEEE 1149.1 JTAG)
Lead-Free β€” Yes

Datasheets & Resources

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