EPM7160STI100-10 vs EPM7160EQC100-20 Comparison
Detailed side-by-side comparison of EPM7160STI100-10 by Altera and EPM7160EQC100-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7160STI100-10
EPM7160STI100-10 - MAX 7000S CPLD, 160 Macrocells, 100MHz | Altera
EPM7160STI100-10 ObsoleteAltera
EPM7160EQC100-20
EPM7160EQC100-20 - MAX 7000 CPLD, 160 Macrocells, 100-Pin PQFP
EPM7160EQC100-20 β Last Time BuySpecification Comparison
| Parameter | EPM7160STI100-10 | EPM7160EQC100-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $90.43 | $17.10 |
| Family | MAX 7000S | MAX 7000 CPLD |
| Macrocells | 160 | 160 |
| Usable Gates | 3,200 | 3,200 |
| User I/Os | 84 | β |
| Logic Elements / Blocks | 16 Logic Array Blocks (LABs) | β |
| Propagation Delay (tPD) | 10 ns | β |
| Maximum Operating Frequency | 100 MHz | β |
| Internal Supply Voltage | 4.75 V to 5.25 V | β |
| I/O Supply Voltage | 5.0 V | β |
| Programmable Type | In-System Programmable (EEPROM) | β |
| Operating Temperature | -40 C to +85 C (Industrial) | 0 Β°C to +90 Β°C (commercial) |
| Package | TQFP-100 (100-pin Thin Quad Flat Pack) | 100-pin Plastic Quad Flat Pack (PQFP, EQFP, EQC100) |
| Mounting Type | Surface Mount | Surface Mount |
| JTAG / Boundary Scan | IEEE Std. 1149.1 compliant | β |
| PCI Compliance | PCI Local Bus Specification Rev. 2.2 (for -10 speed grade) | β |
| RoHS Status | [DATA_NEEDED: RoHS status - not explicitly stated in provided data] | Not RoHS compliant (legacy Altera MAX 7000) |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Series | β | MAX 7000 |
| Architecture | β | CMOS EEPROM-based, non-volatile |
| Logic Array Blocks (LABs) | β | 10 |
| Maximum User I/Os | β | 84 |
| Pin-to-Pin Propagation Delay (tPD) | β | 20 ns |
| Maximum Internal Frequency (fCNT) | β | 62.5 MHz |
| Supply Voltage (VCCINT) | β | 5 V nominal (4.75 V to 5.25 V) |
| I/O Voltage Support | β | 3.3 V or 5 V configurable |
| In-System Programmability | β | Yes (IEEE 1149.1 JTAG, 4-pin) |
| Reprogram Cycles (typical) | β | 100 |
| Logic Elements per Macrocell | β | 36 product terms (expandable) |