EPM7160STI100-10 vs EPM7160SQC160-10 Comparison
Detailed side-by-side comparison of EPM7160STI100-10 by Altera and EPM7160SQC160-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7160STI100-10
EPM7160STI100-10 - MAX 7000S CPLD, 160 Macrocells, 100MHz | Altera
EPM7160STI100-10 ObsoleteAltera
EPM7160SQC160-10
EPM7160SQC160-10 - MAX 7000S CPLD, 160 Macro Cells, 100MHz, PQFP-160 | Intel / Altera
EPM7160SQC160-10 ObsoleteSpecification Comparison
| Parameter | EPM7160STI100-10 | EPM7160SQC160-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $90.43 | $12.20 |
| Family | MAX 7000S | MAX 7000S |
| Macrocells | 160 | β |
| Usable Gates | 3,200 | β |
| User I/Os | 84 | 104 |
| Logic Elements / Blocks | 16 Logic Array Blocks (LABs) | β |
| Propagation Delay (tPD) | 10 ns | β |
| Maximum Operating Frequency | 100 MHz | 100 MHz |
| Internal Supply Voltage | 4.75 V to 5.25 V | β |
| I/O Supply Voltage | 5.0 V | β |
| Programmable Type | In-System Programmable (EEPROM) | β |
| Operating Temperature | -40 C to +85 C (Industrial) | 0 C to +70 C (commercial) |
| Package | TQFP-100 (100-pin Thin Quad Flat Pack) | PQFP-160 (SQC160) |
| Mounting Type | Surface Mount | Surface Mount |
| JTAG / Boundary Scan | IEEE Std. 1149.1 compliant | β |
| PCI Compliance | PCI Local Bus Specification Rev. 2.2 (for -10 speed grade) | β |
| RoHS Status | [DATA_NEEDED: RoHS status - not explicitly stated in provided data] | unknown |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| Lead-Free | [DATA_NEEDED: lead-free status] | unknown |
| Macro Cells | β | 160 |
| Logic Elements / Gates | β | 3,200 usable gates |
| Logic Array Blocks (LABs) | β | 10 |
| Pin-to-Pin Propagation Delay (tPD) | β | 10 ns |
| Supply Voltage (VCCINT) | β | 5.0 V |
| I/O Voltage Tolerance | β | 5.0 V |
| Programming Technology | β | EEPROM, in-system programmable |
| JTAG Support | β | IEEE 1149.1 (boundary-scan + ISP) |
| Logic Family | β | CMOS |
| Process Technology | β | CMOS, EEPROM-based |