EPM7160STI100-10 vs EPM7160STC100-10 Comparison
Detailed side-by-side comparison of EPM7160STI100-10 by Altera and EPM7160STC100-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7160STC100-10 - MAX 7000S CPLD, 160 Macrocells, 100-pin TQFP | Intel
EPM7160STC100-10 β Last Time BuySpecification Comparison
| Parameter | EPM7160STI100-10 | EPM7160STC100-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $90.43 | $15.90 |
| Family | MAX 7000S | MAX 7000S |
| Macrocells | 160 | β |
| Usable Gates | 3,200 | 3,200 |
| User I/Os | 84 | 84 |
| Logic Elements / Blocks | 16 Logic Array Blocks (LABs) | β |
| Propagation Delay (tPD) | 10 ns | β |
| Maximum Operating Frequency | 100 MHz | β |
| Internal Supply Voltage | 4.75 V to 5.25 V | β |
| I/O Supply Voltage | 5.0 V | β |
| Programmable Type | In-System Programmable (EEPROM) | β |
| Operating Temperature | -40 C to +85 C (Industrial) | 0 C to +70 C (commercial) |
| Package | TQFP-100 (100-pin Thin Quad Flat Pack) | 100-pin TQFP |
| Mounting Type | Surface Mount | Surface Mount |
| JTAG / Boundary Scan | IEEE Std. 1149.1 compliant | β |
| PCI Compliance | PCI Local Bus Specification Rev. 2.2 (for -10 speed grade) | β |
| RoHS Status | [DATA_NEEDED: RoHS status - not explicitly stated in provided data] | Non-RoHS (legacy Altera part; -10N variant is RoHS) |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Macro Cells | β | 160 |
| Logic Elements | β | 160 macrocells / 10 Logic Array Blocks |
| Supply Voltage (VCC) | β | 5.0 V (4.75 V - 5.25 V) |
| Propagation Delay (tPD1) | β | 10 ns |
| Global Clock Setup Time | β | 6 ns |
| Internal Counter Frequency | β | 100 MHz |
| Technology | β | CMOS, EEPROM-based |
| In-System Programmability | β | Yes (IEEE 1149.1 JTAG) |