EPM7160STI100-10N vs EPM7160STI100-10 Comparison
Detailed side-by-side comparison of EPM7160STI100-10N by Altera and EPM7160STI100-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7160STI100-10N
EPM7160STI100-10N - MAX 7000S CPLD, 160 Macrocells, 100MHz, TQFP-100 | Intel/Altera
EPM7160STI100-10N β Last Time BuyAltera
EPM7160STI100-10
EPM7160STI100-10 - MAX 7000S CPLD, 160 Macrocells, 100MHz | Altera
EPM7160STI100-10 ObsoleteSpecification Comparison
| Parameter | EPM7160STI100-10N | EPM7160STI100-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.80 | $90.43 |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Macrocells | 160 | 160 |
| Usable Gates | 3200 | 3,200 |
| User I/Os | 84 (per Mouser listing; up to 104 per alternate datasheets) | 84 |
| Logic Blocks | 10 (LABs) | β |
| Propagation Delay (tPD) | 10 ns | 10 ns |
| Internal Frequency | 100 MHz | β |
| Supply Voltage VCC | 5.0 V (3.3 V or 5 V tolerant I/O via MAX 7000S multi-voltage ISP) | β |
| Programmable Technology | EEPROM (non-volatile) | β |
| In-System Programmability | Yes (JTAG/IEEE 1149.1, 5.0V ISP) | β |
| Operating Temperature | -40C to +85C (industrial, 'I' suffix) | -40 C to +85 C (Industrial) |
| Package Type | 100-pin TQFP (TQFP-100) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Lead-Free / RoHS | Yes (lead-free per 'I' industrial suffix) | β |
| Process Technology | CMOS, EEPROM-based | β |
| Logic Elements / Blocks | β | 16 Logic Array Blocks (LABs) |
| Maximum Operating Frequency | β | 100 MHz |
| Internal Supply Voltage | β | 4.75 V to 5.25 V |
| I/O Supply Voltage | β | 5.0 V |
| Programmable Type | β | In-System Programmable (EEPROM) |
| Package | β | TQFP-100 (100-pin Thin Quad Flat Pack) |
| JTAG / Boundary Scan | β | IEEE Std. 1149.1 compliant |
| PCI Compliance | β | PCI Local Bus Specification Rev. 2.2 (for -10 speed grade) |
| RoHS Status | β | [DATA_NEEDED: RoHS status - not explicitly stated in provided data] |
| MSL Level | β | [DATA_NEEDED: MSL rating] |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |