EPM7192EGI160-20 vs EPM7192EGM160-20 Comparison
Detailed side-by-side comparison of EPM7192EGI160-20 by Intel and EPM7192EGM160-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7192EGM160-20 - 192-Macrocell MAX 7000 CPLD, 20ns PGA-160 | Altera
EPM7192EGM160-20 ObsoleteSpecification Comparison
| Parameter | EPM7192EGI160-20 | EPM7192EGM160-20 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $264.10 | $15.60 |
| Family | MAX 7000 | MAX 7000 |
| Device Type | CPLD (Complex Programmable Logic Device) | EE CMOS CPLD (Electrically Erasable) |
| Macrocells | 192 | 192 |
| Logic Array Blocks | 4 | β |
| User I/O Pins | 36 | β |
| Dedicated Inputs | 4 | β |
| Pin-to-Pin Delay (tpd) | 20 ns | β |
| Maximum Operating Frequency | 62.5 MHz | β |
| Supply Voltage (VCCINT) | 5.0 V | β |
| Program Memory Type | EEPROM | β |
| In-System Programmability | Yes (JTAG IEEE Std. 1149.1) | β |
| Package | 160-pin CPGA (Ceramic Pin Grid Array) | PGA-160 (160-pin Pin Grid Array) |
| Operating Temperature Grade | Industrial (-40C to +85C) | β |
| RoHS Status | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Programming Interface | JTAG (ByteBlaster / USB-Blaster compatible) | β |
| Logic Array Blocks (LABs) | β | 12 |
| Usable Gates | β | 600 to 5,000 |
| Maximum User I/O Pins | β | 120 |
| Speed Grade | β | -20 (20 ns pin-to-pin) |
| Pin-to-Pin Propagation Delay | β | 20 ns |
| Counter Frequency (max) | β | 175.4 MHz |
| I/O Standards | β | 3.3 V or 5 V configurable |
| Global Clock Inputs | β | 2 (GCLK1, GCLK2) |
| In-System Programming | β | Yes (JTAG IEEE 1149.1) |
| Program/Erase Endurance | β | 100 cycles (EEPROM) |
| Operating Temperature | β | -40C to +125C (industrial) |
| Technology Node | β | CMOS, second-generation MAX architecture |