EPM7192EGM160-20 vs EPM7192EQC160-20 Comparison

Detailed side-by-side comparison of EPM7192EGM160-20 by Altera and EPM7192EQC160-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7192EGM160-20 EPM7192EQC160-20
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $15.60 $58.26
Family MAX 7000 β€”
Device Type EE CMOS CPLD (Electrically Erasable) β€”
Macrocells 192 β€”
Logic Array Blocks (LABs) 12 β€”
Usable Gates 600 to 5,000 β€”
Maximum User I/O Pins 120 β€”
Package PGA-160 (160-pin Pin Grid Array) β€”
Speed Grade -20 (20 ns pin-to-pin) β€”
Pin-to-Pin Propagation Delay 20 ns β€”
Counter Frequency (max) 175.4 MHz β€”
I/O Standards 3.3 V or 5 V configurable β€”
Global Clock Inputs 2 (GCLK1, GCLK2) β€”
In-System Programming Yes (JTAG IEEE 1149.1) β€”
Program/Erase Endurance 100 cycles (EEPROM) β€”
Operating Temperature -40C to +125C (industrial) -40C to +85C (industrial)
Technology Node CMOS, second-generation MAX architecture β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status - non-RoHS era part]
Series β€” MAX 7000
Programmable Type β€” EE PLD (EEPROM-based)
Number of Macrocells β€” 192
Number of Logic Array Blocks β€” 4
Number of User I/O Pins β€” 124 (per package), 36 (per data source variant description)
Delay Time (tPD) β€” 20 ns
Internal Counter Frequency (fCNT) β€” 100 MHz typical
Supply Voltage (VCCINT) β€” 4.75 V to 5.25 V
Package / Case β€” 160-BQFP / 160-PQFP (28x28 mm)
Mounting Type β€” Surface Mount
In-System Programmable (ISP) β€” Yes, 5.0 V ISP via JTAG (IEEE Std. 1149.1)
Programmable Security Bit β€” Yes
Power-Saving Mode β€” Yes, programmable per macrocell
MSL Level β€” [DATA_NEEDED: MSL rating]

Datasheets & Resources

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