EPM7192EQC160-20 vs EPM7192EGM160-15 Comparison
Detailed side-by-side comparison of EPM7192EQC160-20 by Intel and EPM7192EGM160-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7192EQC160-20
EPM7192EQC160-20 - 192-Macrocell MAX 7000 CPLD, 20ns, PQFP-160 | Intel
EPM7192EQC160-20 ObsoleteAltera
EPM7192EGM160-15
EPM7192EGM160-15 - MAX 7000 CPLD, 192 Macrocells, PGA-160 | Altera
EPM7192EGM160-15 NrndSpecification Comparison
| Parameter | EPM7192EQC160-20 | EPM7192EGM160-15 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $58.26 | $36.80 |
| Series | MAX 7000 | β |
| Programmable Type | EE PLD (EEPROM-based) | β |
| Number of Macrocells | 192 | β |
| Number of Logic Array Blocks | 4 | β |
| Number of User I/O Pins | 124 (per package), 36 (per data source variant description) | β |
| Delay Time (tPD) | 20 ns | β |
| Internal Counter Frequency (fCNT) | 100 MHz typical | β |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | β |
| Operating Temperature | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Package / Case | 160-BQFP / 160-PQFP (28x28 mm) | β |
| Mounting Type | Surface Mount | Through-hole (PGA socket) |
| In-System Programmable (ISP) | Yes, 5.0 V ISP via JTAG (IEEE Std. 1149.1) | β |
| Programmable Security Bit | Yes | β |
| Power-Saving Mode | Yes, programmable per macrocell | β |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| RoHS Status | [DATA_NEEDED: RoHS status - non-RoHS era part] | [DATA_NEEDED: RoHS status] |
| Family | β | MAX 7000 |
| Sub-family | β | MAX 7000E |
| Device | β | EPM7192E |
| Macrocells | β | 192 |
| Usable Gates | β | 3750 |
| Logic Array Blocks (LABs) | β | 12 (16 macrocells each) |
| User I/O Pins | β | 124 |
| Package | β | 160-pin PGA (Pin Grid Array), ceramic |
| Pin-to-Pin Logic Delay (tPD) | β | 15 ns |
| Supply Voltage (Core) | β | 5 V Β±5% |
| I/O Voltage | β | 3.3 V or 5 V configurable |
| Technology | β | CMOS EEPROM (0.5 Β΅m) |
| Programming Interface | β | JTAG (ByteBlaster / BitBlaster) |