EPM7192EQC160-20 vs EPM7192SQC160-10N Comparison

Detailed side-by-side comparison of EPM7192EQC160-20 by Intel and EPM7192SQC160-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EPM7192EQC160-20

EPM7192EQC160-20 - 192-Macrocell MAX 7000 CPLD, 20ns, PQFP-160 | Intel

EPM7192EQC160-20 Obsolete

Specification Comparison

Parameter EPM7192EQC160-20 EPM7192SQC160-10N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $58.26 $9.95
Series MAX 7000 MAX 7000S
Programmable Type EE PLD (EEPROM-based) β€”
Number of Macrocells 192 β€”
Number of Logic Array Blocks 4 β€”
Number of User I/O Pins 124 (per package), 36 (per data source variant description) β€”
Delay Time (tPD) 20 ns β€”
Internal Counter Frequency (fCNT) 100 MHz typical β€”
Supply Voltage (VCCINT) 4.75 V to 5.25 V 5.0 V
Operating Temperature -40C to +85C (industrial) [DATA_NEEDED: commercial/industrial grade]
Package / Case 160-BQFP / 160-PQFP (28x28 mm) 160-BQFP (PQFP, 0.65 mm pitch)
Mounting Type Surface Mount Surface Mount
In-System Programmable (ISP) Yes, 5.0 V ISP via JTAG (IEEE Std. 1149.1) β€”
Programmable Security Bit Yes β€”
Power-Saving Mode Yes, programmable per macrocell β€”
MSL Level [DATA_NEEDED: MSL rating] β€”
RoHS Status [DATA_NEEDED: RoHS status - non-RoHS era part] [DATA_NEEDED: RoHS compliance status]
Family β€” MAX 7000
Device Type β€” CPLD (Complex Programmable Logic Device)
Macrocells β€” 192
Logic Array Blocks (LABs) β€” 12
Usable Gates β€” 3,750
User I/O Pins β€” 124
Pin-to-Pin Delay (tPD) β€” 10 ns
Maximum Operating Frequency β€” 100 MHz
Process Technology β€” 0.30 Β΅m CMOS EEPROM
In-System Programmability β€” Yes (IEEE 1149.1 JTAG)

Datasheets & Resources

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