EPM7192SQC160-7N vs EPM7192SQC160-10N Comparison

Detailed side-by-side comparison of EPM7192SQC160-7N by Altera and EPM7192SQC160-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM7192SQC160-7N

EPM7192SQC160-7N - MAX 7000S 192-Macro CPLD, 7.5ns, PQFP-160 | Altera

EPM7192SQC160-7N Obsolete

Specification Comparison

Parameter EPM7192SQC160-7N EPM7192SQC160-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $9.60 $9.95
Family MAX 7000S MAX 7000
Logic Family CMOS β€”
Macro Cells 192 β€”
Usable Gates 3,750 3,750
User I/Os 124 β€”
Propagation Delay (tPD) 7.5 ns β€”
Internal Counter Frequency 167 MHz β€”
Pin Count 160 β€”
Package Type PQFP (Plastic Quad Flat Pack) β€”
Supply Voltage (VCCINT) 5.0 V 5.0 V
I/O Voltage (VCCIO) 3.3 V / 5.0 V selectable β€”
Programmability EEPROM, In-System (JTAG ISP) β€”
JTAG Support IEEE 1149.1 Boundary Scan β€”
Operating Temperature 0 C to 70 C (Commercial) [DATA_NEEDED: commercial/industrial grade]
Mounting Type Surface Mount Surface Mount
Lead-Free (Pb-Free) Yes (N suffix) β€”
RoHS Status Compliant (Pb-free terminal finish) [DATA_NEEDED: RoHS compliance status]
Series β€” MAX 7000S
Device Type β€” CPLD (Complex Programmable Logic Device)
Macrocells β€” 192
Logic Array Blocks (LABs) β€” 12
User I/O Pins β€” 124
Pin-to-Pin Delay (tPD) β€” 10 ns
Maximum Operating Frequency β€” 100 MHz
Process Technology β€” 0.30 Β΅m CMOS EEPROM
In-System Programmability β€” Yes (IEEE 1149.1 JTAG)
Package / Case β€” 160-BQFP (PQFP, 0.65 mm pitch)

Datasheets & Resources

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