EPM7192SQI160-10N vs EPM7192SQC160-7N Comparison
Detailed side-by-side comparison of EPM7192SQI160-10N by Intel and EPM7192SQC160-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7192SQC160-7N - MAX 7000S 192-Macro CPLD, 7.5ns, PQFP-160 | Altera
EPM7192SQC160-7N ObsoleteSpecification Comparison
| Parameter | EPM7192SQI160-10N | EPM7192SQC160-7N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $35.90 | $9.60 |
| Series | MAX 7000S | β |
| Family | MAX 7000 | MAX 7000S |
| Architecture | Second-generation MAX (CMOS, EEPROM) | β |
| Logic Elements / Macrocells | 192 macrocells | β |
| Usable Gates | 3.75K (typical) | 3,750 |
| User I/Os | 124 | 124 |
| Pin Count | 160 | 160 |
| Package | PQFP-160 (QFP-160, plastic) | β |
| Pin-to-Pin Delay (tPD) | 10 ns | β |
| Maximum Internal Frequency | 167 MHz | β |
| Supply Voltage (VCCINT) | 5.0 V | 5.0 V |
| Supply Voltage (VCCIO) | 5.0 V | β |
| In-System Programmability | Yes (5V ISP, JTAG) | β |
| Boundary-Scan Support | IEEE 1149.1 (JTAG) | β |
| Operating Temperature | 0C to +70C (industrial, 'N' suffix) | 0 C to 70 C (Commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| Technology | 5V CMOS, EEPROM configuration memory | β |
| Logic Family | CMOS | CMOS |
| Propagation Delay | 7.5 ns to 10 ns (speed grade dependent) | β |
| RoHS Status | Compliant (per lead-free PQFP package marking) | Compliant (Pb-free terminal finish) |
| Macro Cells | β | 192 |
| Propagation Delay (tPD) | β | 7.5 ns |
| Internal Counter Frequency | β | 167 MHz |
| Package Type | β | PQFP (Plastic Quad Flat Pack) |
| I/O Voltage (VCCIO) | β | 3.3 V / 5.0 V selectable |
| Programmability | β | EEPROM, In-System (JTAG ISP) |
| JTAG Support | β | IEEE 1149.1 Boundary Scan |
| Lead-Free (Pb-Free) | β | Yes (N suffix) |