EPM7256AETI100-7N vs EPM7128AETI100-7N Comparison
Detailed side-by-side comparison of EPM7256AETI100-7N by Intel and EPM7128AETI100-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7256AETI100-7N - 256-MacroCell MAX 7000A CPLD, 100TQFP | Intel
EPM7256AETI100-7N β Last Time BuyAltera
EPM7128AETI100-7N - MAX 7000A CPLD 128 Macro 84 I/O | Intel/Altera
EPM7128AETI100-7N ObsoleteSpecification Comparison
| Parameter | EPM7256AETI100-7N | EPM7128AETI100-7N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $34.20 | $28.50 |
| Family | MAX 7000A | MAX 7000A CPLD |
| Device Type | CPLD - Complex Programmable Logic Device | β |
| Macrocells | 256 | β |
| Usable Gates | 5,000 | β |
| Maximum User I/O | 84 | β |
| Logic Elements / Blocks | 16 Logic Array Blocks | β |
| Maximum Operating Frequency | 126.6 MHz | β |
| Propagation Delay (tPD) | 7.5 ns | β |
| Core Supply Voltage (VCCINT) | 3.3 V | β |
| I/O Supply Voltage (VCCIO) | 3.3 V | β |
| Technology | CMOS, EEPROM-based configuration | β |
| Programmability | In-system programmable via JTAG (IEEE 1149.1) | β |
| Package | 100-pin TQFP (TQ100, 14x14 mm, 0.5 mm pitch) | 100-pin TQFP (14x14 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C (Industrial) |
| MSL Level | 3 (168 hours) | β |
| RoHS Status | Compliant | Compliant |
| Series | β | MAX 7000A |
| Macro Cells | β | 128 |
| Number of Usable Gates | β | 2,500 |
| Number of I/O | β | 84 |
| Number of Logic Array Blocks (LABs) | β | 8 |
| Propagation Delay (tPD max) | β | 7 ns |
| Maximum Operating Frequency (fCNT) | β | 129.9 MHz |
| Supply Voltage (VCCINT) | β | 3.0 V to 3.6 V |
| I/O Bank Voltage (VCCIO) | β | 2.5 V / 3.3 V / 5.0 V (multi-volt I/O) |
| Process Technology | β | CMOS EEPROM |
| In-System Programmability | β | Yes (JTAG IEEE 1149.1) |