EPM7256AQC208-7 vs EPM7256SQC208-15N Comparison

Detailed side-by-side comparison of EPM7256AQC208-7 by Altera and EPM7256SQC208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7256AQC208-7 EPM7256SQC208-15N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $27.20 $0.00
Family MAX 7000A β€”
Programmable Type In System Programmable (ISP), EEPROM-based β€”
Macrocells 256 256
Usable Gates 5,000 β€”
Logic Array Blocks (LABs) 16 β€”
Maximum User I/O Pins 164 β€”
Pin-to-Pin Logic Delay (tPD) 7 ns β€”
Maximum Counter Frequency 125 MHz β€”
Internal Toggle Frequency 227.3 MHz β€”
Supply Voltage - Internal 3.0 V to 3.6 V β€”
I/O Voltage Compatibility 5.0 V, 3.3 V, 2.5 V (MultiVolt I/O) β€”
Package 208-Pin PQFP (28 x 28 mm) 208-pin PQFP
Supplier Device Package 208-PQFP (28x28) β€”
Mounting Type Surface Mount Surface Mount
Operating Temperature Range 0C to +70C (commercial) β€”
JTAG Interface IEEE 1149.1 (JTAG) boundary scan IEEE 1149.1 boundary-scan
Configuration Memory EEPROM (non-volatile) EEPROM (non-volatile)
Speed Grade -7 -15
RoHS Status [DATA_NEEDED: RoHS status] Lead free / RoHS Compliant
MSL Level [DATA_NEEDED: MSL level] β€”
Series β€” MAX 7000S
User I/O Pins β€” 164
Pin-to-Pin Delay β€” 15 ns (speed grade -15)
Supply Voltage β€” 5 V
In-System Programmability β€” Yes (ISP)
Operating Temperature β€” [DATA_NEEDED: operating temperature range]
Logic Array Blocks β€” 16 macrocells per LAB
Interconnect β€” Programmable Interconnect Array (PIA)
Product Category β€” CPLD - Complex Programmable Logic Devices
Manufacturer β€” Altera (Intel Programmable Solutions Group)

Datasheets & Resources

Browse All Products Create BOM Request Quote