EPM7256EQC160-12 vs EPM7256EGC192-12 Comparison

Detailed side-by-side comparison of EPM7256EQC160-12 by Intel and EPM7256EGC192-12 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7256EQC160-12 EPM7256EGC192-12
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $17.10 $17.85
Family MAX 7000 MAX 7000
Programmable Type EE PLD (CPLD, in-system programmable EEPROM) β€”
Number of Macrocells 256 β€”
Number of Logic Blocks / LABs 16 β€”
Number of Gates 5,000 usable gates β€”
Number of I/O Pins 132 β€”
Propagation Delay tPD (max) 12 ns β€”
Maximum Operating Frequency 90.9 MHz 90.9 MHz
Supply Voltage VCCINT 4.75 V to 5.25 V β€”
I/O Standard 5 V TTL, 3.3 V compatible β€”
Operating Temperature 0 Β°C to 70 Β°C (Commercial) 0C to +70C (commercial)
Package / Case 160-pin PQFP (28 Γ— 28 mm) β€”
Mounting Type Surface Mount Through Hole (PGA socket)
Process Technology CMOS EEPROM β€”
Programming Interface JTAG (IEEE 1532 / IEEE 1149.1) β€”
RoHS Status Compliant (lead-free PQFP) Compliant
Lifecycle Status Obsolete β€”
Device Logic Cells β€” 256 macrocells
Usable Gates β€” 5,000
Propagation Delay (tPD) β€” 12 ns
User I/O Pins β€” 164
Supply Voltage (VCCINT) β€” 4.75 V to 5.25 V (5 V nominal)
Package β€” 192-pin CPGA (Ceramic Pin Grid Array)
Technology β€” CMOS, EEPROM-based
Programmable Interface β€” JTAG (IEEE 1149.1) / ISP
Logic Blocks (LABs) β€” 16
Macrocells per LAB β€” 16
Lead-Free β€” Yes
JEDEC Package Code β€” S-CPGA-P192

Datasheets & Resources

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