EPM7256SQC208-15 vs EPM7256SQC208-10 Comparison
Detailed side-by-side comparison of EPM7256SQC208-15 by Altera and EPM7256SQC208-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM7256SQC208-10 - MAX 7000S CPLD, 256 Macrocells, 10ns, 208-PQFP | Intel
EPM7256SQC208-10 ObsoleteSpecification Comparison
| Parameter | EPM7256SQC208-15 | EPM7256SQC208-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $3.65 | $11.20 |
| Family | MAX 7000S | β |
| Series | EPM7256 | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 256 | 256 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Usable Gates | 5000 | 5,000 |
| User I/O Pins | 164 | β |
| Pin-to-Pin Delay (tPD) | 15 ns | β |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | β |
| Operating Temperature Range | 0 C to +70 C (Commercial) | β |
| Package | 208-pin PQFP (28x28 mm) | 208-pin PQFP (SQC208) |
| Mounting Type | Surface Mount | Surface Mount |
| Programmable Power Mode | Yes (per-macrocell turbo-bit) | β |
| JTAG (IEEE 1149.1) Boundary-Scan | Yes | β |
| In-System Programmability (ISP) | Yes | β |
| Configuration Memory | EEPROM (non-volatile) | β |
| RoHS Status | Contains lead / RoHS non-compliant (per third-party listing) | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free Status | Contains lead | β |
| Number of I/O Pins | β | 164 |
| Propagation Delay (tPD) | β | 10 ns |
| Counter Speed (fCNT) | β | Up to 175.4 MHz |
| Programmable Technology | β | EEPROM (in-system programmable) |
| JTAG Support (IEEE 1149.1) | β | Yes |
| PCI Compliance | β | PCI Local Bus Specification 2.2 compliant |
| Operating Temperature | β | 0C to +70C (commercial) |
| MSL Level | β | 3 (168 hours) |