EPM7256SQC208-15N vs EPM7256SQC208-10 Comparison

Detailed side-by-side comparison of EPM7256SQC208-15N by Altera and EPM7256SQC208-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM7256SQC208-15N

EPM7256SQC208-15N - MAX 7000S CPLD 256 Macrocell | Altera

EPM7256SQC208-15N Obsolete
Intel
EPM7256SQC208-10

EPM7256SQC208-10 - MAX 7000S CPLD, 256 Macrocells, 10ns, 208-PQFP | Intel

EPM7256SQC208-10 Obsolete

Specification Comparison

Parameter EPM7256SQC208-15N EPM7256SQC208-10
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $11.20
Series MAX 7000S MAX 7000S
Macrocells 256 256
User I/O Pins 164 β€”
Pin-to-Pin Delay 15 ns (speed grade -15) β€”
Supply Voltage 5 V β€”
Package 208-pin PQFP 208-pin PQFP (SQC208)
Mounting Type Surface Mount Surface Mount
Configuration Memory EEPROM (non-volatile) β€”
JTAG Interface IEEE 1149.1 boundary-scan β€”
In-System Programmability Yes (ISP) β€”
Operating Temperature [DATA_NEEDED: operating temperature range] 0C to +70C (commercial)
RoHS Status Lead free / RoHS Compliant [DATA_NEEDED: RoHS compliance status]
Logic Array Blocks 16 macrocells per LAB β€”
Interconnect Programmable Interconnect Array (PIA) β€”
Speed Grade -15 β€”
Product Category CPLD - Complex Programmable Logic Devices β€”
Manufacturer Altera (Intel Programmable Solutions Group) β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
Logic Array Blocks (LABs) β€” 16
Usable Gates β€” 5,000
Number of I/O Pins β€” 164
Propagation Delay (tPD) β€” 10 ns
Counter Speed (fCNT) β€” Up to 175.4 MHz
Programmable Technology β€” EEPROM (in-system programmable)
JTAG Support (IEEE 1149.1) β€” Yes
PCI Compliance β€” PCI Local Bus Specification 2.2 compliant
MSL Level β€” 3 (168 hours)

Datasheets & Resources

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