EPM7256SQC208-15N vs EPM7256SQI208-10 Comparison

Detailed side-by-side comparison of EPM7256SQC208-15N by Altera and EPM7256SQI208-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM7256SQC208-15N

EPM7256SQC208-15N - MAX 7000S CPLD 256 Macrocell | Altera

EPM7256SQC208-15N Obsolete
Altera
EPM7256SQI208-10

EPM7256SQI208-10 - MAX 7000 CPLD 256 Macrocell 10ns | Altera

EPM7256SQI208-10 Nrnd

Specification Comparison

Parameter EPM7256SQC208-15N EPM7256SQI208-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $0.40
Series MAX 7000S β€”
Macrocells 256 256
User I/O Pins 164 β€”
Pin-to-Pin Delay 15 ns (speed grade -15) β€”
Supply Voltage 5 V β€”
Package 208-pin PQFP 208-pin PQFP (QFP208)
Mounting Type Surface Mount Surface Mount
Configuration Memory EEPROM (non-volatile) EEPROM (non-volatile)
JTAG Interface IEEE 1149.1 boundary-scan β€”
In-System Programmability Yes (ISP) β€”
Operating Temperature [DATA_NEEDED: operating temperature range] β€”
RoHS Status Lead free / RoHS Compliant [DATA_NEEDED: RoHS status]
Logic Array Blocks 16 macrocells per LAB 16
Interconnect Programmable Interconnect Array (PIA) β€”
Speed Grade -15 β€”
Product Category CPLD - Complex Programmable Logic Devices β€”
Manufacturer Altera (Intel Programmable Solutions Group) β€”
Device Family β€” MAX 7000 (EPM7256)
Usable Gates β€” 5000
Maximum User I/O Pins β€” 164
Propagation Delay (tPD) β€” 10 ns
Supply Voltage Range β€” 4.5 V to 5.5 V
Technology β€” CMOS EEPROM
In-System Programmable β€” Yes (IEEE 1149.1 JTAG)
Package Body Material β€” Plastic/Epoxy
Terminal Form β€” Gull Wing
Operating Temperature Range β€” -40 C to +85 C (Industrial)
JESD-30 Package Code β€” S-PQFP-G208
JESD-609 Terminal Finish Code β€” E3

Datasheets & Resources

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