EPM7256SQI208-10 vs EPM7256SRC208-10 Comparison
Detailed side-by-side comparison of EPM7256SQI208-10 by Altera and EPM7256SRC208-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7256SQI208-10 | EPM7256SRC208-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.40 | $27.20 |
| Device Family | MAX 7000 (EPM7256) | β |
| Macrocells | 256 | β |
| Usable Gates | 5000 | β |
| Logic Array Blocks | 16 | β |
| Maximum User I/O Pins | 164 | β |
| Propagation Delay (tPD) | 10 ns | β |
| Supply Voltage Range | 4.5 V to 5.5 V | β |
| Technology | CMOS EEPROM | β |
| Configuration Memory | EEPROM (non-volatile) | β |
| In-System Programmable | Yes (IEEE 1149.1 JTAG) | β |
| Package | 208-pin PQFP (QFP208) | 208-pin RQFP (BFQFP) exposed pad, 28x28 mm |
| Package Body Material | Plastic/Epoxy | β |
| Terminal Form | Gull Wing | Gull Wing |
| Operating Temperature Range | -40 C to +85 C (Industrial) | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| JESD-30 Package Code | S-PQFP-G208 | β |
| JESD-609 Terminal Finish Code | E3 | β |
| Family | β | MAX 7000S |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Number of Macrocells | β | 256 |
| Number of Logic Array Blocks (LABs) | β | 16 |
| Number of Gates | β | 5000 |
| Number of User I/O Pins | β | 164 |
| Maximum Propagation Delay (tPD) | β | 10 ns |
| Maximum Operating Frequency | β | 100 MHz |
| Supply Voltage (Internal) | β | 4.75 V to 5.25 V |
| Programmable Type | β | In System Programmable (ISP, JTAG) |
| Configuration Technology | β | EEPROM |
| Operating Temperature | β | 0C to +70C (TA, commercial) |
| Package Shape | β | Square |
| Product Status | β | Obsolete |