EPM7256SRI208-10 vs EPM7256SQC208-15 Comparison

Detailed side-by-side comparison of EPM7256SRI208-10 by Intel and EPM7256SQC208-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7256SRI208-10 EPM7256SQC208-15
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $27.20 $3.65
Logic Family MAX 7000S (EEPROM-based CPLD) β€”
Macrocells 256 256
Logic Array Blocks 16 β€”
Usable Gates 5,000 5000
User I/O Pins 164 164
Pin-to-Pin Propagation Delay (tPD) 10 ns β€”
Maximum Internal Frequency 100 MHz β€”
Supply Voltage (Internal) 4.5 V to 5.5 V β€”
Logic Family Technology CMOS β€”
Programmable Type In-System Programmable (ISP) via JTAG β€”
Package 208-pin RQFP (PowerQuad) 208-pin PQFP (28x28 mm)
Mounting Type Surface Mount Surface Mount
Operating Temperature Range Industrial (-40C to +85C) 0 C to +70 C (Commercial)
Configuration Memory EEPROM (non-volatile) EEPROM (non-volatile)
JTAG Boundary Scan Yes (BST circuitry) β€”
RoHS Status [DATA_NEEDED: RoHS status] Contains lead / RoHS non-compliant (per third-party listing)
Packaging Tray β€”
Family β€” MAX 7000S
Series β€” EPM7256
Device Type β€” CPLD (Complex Programmable Logic Device)
Logic Array Blocks (LABs) β€” 16
Pin-to-Pin Delay (tPD) β€” 15 ns
Supply Voltage (VCCINT) β€” 4.75 V to 5.25 V
Programmable Power Mode β€” Yes (per-macrocell turbo-bit)
JTAG (IEEE 1149.1) Boundary-Scan β€” Yes
In-System Programmability (ISP) β€” Yes
Lead-Free Status β€” Contains lead

Datasheets & Resources

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