EPM7512BQC208-10 vs EPM7512BQC208-5 Comparison
Detailed side-by-side comparison of EPM7512BQC208-10 by Altera and EPM7512BQC208-5 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7512BQC208-10
EPM7512BQC208-10 - 512-Macrocell MAX 7000B CPLD, 10ns, PQFP-208 | Altera (Intel)
EPM7512BQC208-10 NrndAltera
EPM7512BQC208-5
EPM7512BQC208-5 - MAX 7000B CPLD 512 Macro 176 IO | Altera
EPM7512BQC208-5 ObsoleteSpecification Comparison
| Parameter | EPM7512BQC208-10 | EPM7512BQC208-5 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $19.40 | $38.66 |
| Family | MAX 7000B | MAX 7000B |
| Series | MAX 7000B | β |
| Macrocells | 512 | 512 |
| Logic Elements / Blocks | 32 LABs (16 macrocells per LAB) | β |
| Usable Gates | 10,000 | 10,000 |
| User I/Os | 176 | β |
| Propagation Delay (tpd) | 10 ns (max, pin-to-pin) | β |
| Programmable Type | In-System Programmable (EEPROM) | In System Programmable (ISP) |
| Internal Supply Voltage | 2.375 V to 2.625 V (nominal 2.5 V) | β |
| Operating Temperature | 0 C to +70 C (commercial) | 0C to 70C (commercial) |
| Package / Case | 208-pin PQFP (28x28 mm), S-PQFP-G208 | β |
| Mounting Type | Surface Mount | Surface Mount |
| Architecture | CMOS, Multiple Array Matrix (MAX) second-generation | β |
| JTAG / Boundary Scan | IEEE Std 1149.1 compliant | β |
| MSL Level | [DATA_NEEDED: MSL Level] | β |
| RoHS Status | unknown | [DATA_NEEDED: RoHS status] |
| Device Type | β | EEPROM-based Complex Programmable Logic Device (CPLD) |
| User I/O Pins | β | 176 |
| Logic Array Blocks | β | 16 |
| Propagation Delay (tPD) | β | 5 ns |
| Internal Frequency | β | 163.9 MHz |
| Supply Voltage (VCCINT) | β | 2.375 V to 2.625 V (2.5 V nominal) |
| Configuration Memory | β | EEPROM (non-volatile) |
| Package | β | 208-pin PQFP (28x28 mm) |
| Package Code | β | FQFP / S-PQFP-G208 |
| Terminal Pitch | β | 0.5 mm |
| JTAG Support | β | IEEE 1149.1 boundary-scan |
| Speed Grade | β | -5 (fastest MAX 7000B grade) |