EPM9320ALC84-10N vs EPM9320LC84-10 Comparison
Detailed side-by-side comparison of EPM9320ALC84-10N by Intel and EPM9320LC84-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320ALC84-10N | EPM9320LC84-10 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $21.40 | $84.96 |
| Series | MAX 9000A | β |
| Family | MAX 9000 | MAX 9000 EPLD |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Number of Macrocells | 320 | β |
| Number of Gates | 6,000 | β |
| Number of Logic Array Blocks (LABs) | 16 | β |
| User I/O Pins | 60 | β |
| Propagation Delay (tPD) | 10 ns | β |
| Maximum Internal Frequency (fCNT) | 144.9 MHz | β |
| Supply Voltage (VCC) | 5.0 V nominal | 5.0 V (typical, see datasheet) |
| Operating Temperature Range | 0C to +70C (Commercial) | β |
| Programmable Technology | EEPROM (in-system programmable) | β |
| Programming Interface | JTAG (IEEE 1149.1) | JTAG (IEEE 1149.1) boundary-scan, Altera ByteBlaster compatible |
| Package | 84-Pin PLCC (Plastic Leaded Chip Carrier) | 84-pin PLCC (JEDEC MO-047) |
| Mounting Type | Through-Hole / Socket | Surface Mount (PLCC socket also common) |
| Part Status | Obsolete | β |
| Device | β | EPM9320 |
| Macrocells | β | 320 |
| Usable Gates | β | 6000 (typical) |
| Logic Array Blocks (LABs) | β | 16 |
| Maximum User I/O Pins | β | 168 (varies by package) |
| Pin-to-Pin Logic Delay (tPD) | β | 10 ns |
| Maximum Frequency (fCNT) | β | [DATA_NEEDED: fCNT in MHz] |
| Process Technology | β | 0.7 Β΅m CMOS EEPROM/UV-EPROM |
| Operating Temperature | β | 0C to +70C (commercial) [DATA_NEEDED: exact grade suffix] |
| Configuration | β | Non-volatile EEPROM (instant-on, no boot PROM) |
| RoHS Status | β | ROHS3 Compliant (per fpgalink listing) |
| Moisture Sensitivity Level (MSL) | β | MSL-3, 168 hours (per fpgalink listing) |
| Manufacturer Lead Time | β | 1-7 days (per fpgalink listing) |