EPM9320ALC84-15 vs EPM9320ALC84-10 Comparison

Detailed side-by-side comparison of EPM9320ALC84-15 by Altera and EPM9320ALC84-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9320ALC84-15 EPM9320ALC84-10
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $9.95 $19.80
Family MAX 9000 CPLD MAX 9000
Macrocells 320 320
Usable Gates 6000 β€”
Propagation Delay (tPD) 16 ns β€”
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) β€”
User I/O 56 β€”
Logic Array Blocks (LABs) 16 16
Technology CMOS, EEPROM-based configuration CMOS EEPROM-based, third-generation MAX
Package 84-pin PLCC (S-PQCC-J84, J-lead) 84-pin PLCC (J-Lead)
Mounting Type Through-hole / socket Surface Mount / Through-Hole (PLCC socket)
Programming Interface JTAG (IEEE 1149.1) / ISP β€”
Operating Temperature -40C to +85C (industrial) [DATA_NEEDED: commercial/industrial grade]
RoHS Status [DATA_NEEDED: rohs status] [DATA_NEEDED]
Moisture Sensitivity Level (MSL) MSL-3 (168 hours per fpgalink.com) β€”
Lead-Free / Halogen-Free [DATA_NEEDED: lead free status] β€”
RoHS3 Compliance ROHS3 Compliant (per fpgalink.com listing) β€”
Device β€” EPM9320
Maximum User I/O Pins β€” 52
Dedicated Inputs β€” 16
Speed Grade β€” -10 (10 ns pin-to-pin delay)
Pin-to-Pin Delay (tPD) β€” 10 ns
Supply Voltage (VCCINT) β€” 5.0 V
In-System Programmability β€” 5.0 V ISP via IEEE 1149.1 JTAG
PCI Compliance β€” PCI Local Bus Specification Rev. 2.2 (speed grade -10)
Non-Volatile Configuration β€” Yes (EEPROM cell, powers up in known state)
Architecture β€” MAX (Multiple Array MatriX) with FastTrack Interconnect

Datasheets & Resources

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