EPM9320ALC84-15 vs EPM9320LC84-15 Comparison

Detailed side-by-side comparison of EPM9320ALC84-15 by Altera and EPM9320LC84-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9320ALC84-15 EPM9320LC84-15
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $9.95 $17.95
Family MAX 9000 CPLD MAX 9000
Macrocells 320 320
Usable Gates 6000 6,000
Propagation Delay (tPD) 16 ns 15 ns (max)
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) 4.75 V to 5.25 V (5.0 V nominal)
User I/O 56 β€”
Logic Array Blocks (LABs) 16 20
Technology CMOS, EEPROM-based configuration CMOS EEPROM-based, third-generation Multiple Array MatriX (MAX)
Package 84-pin PLCC (S-PQCC-J84, J-lead) 84-pin PLCC (Plastic Leaded Chip Carrier)
Mounting Type Through-hole / socket Surface Mount
Programming Interface JTAG (IEEE 1149.1) / ISP β€”
Operating Temperature -40C to +85C (industrial) -40C to +85C (commercial) [DATA_NEEDED: exact grade]
RoHS Status [DATA_NEEDED: rohs status] [DATA_NEEDED: confirm from manufacturer]
Moisture Sensitivity Level (MSL) MSL-3 (168 hours per fpgalink.com) β€”
Lead-Free / Halogen-Free [DATA_NEEDED: lead free status] β€”
RoHS3 Compliance ROHS3 Compliant (per fpgalink.com listing) β€”
Series β€” EPM9320
Device Type β€” CPLD (Complex Programmable Logic Device)
Maximum Clock Frequency β€” 117.6 MHz
Programmability β€” 5.0 V in-system programmable (ISP) via JTAG
JTAG Interface β€” IEEE Std. 1149.1 boundary-scan compliant
Built-in Pull-up Resistors β€” Yes, on every I/O pin
Architecture Feature β€” Pin-locking across design iterations

Datasheets & Resources

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