EPM9320ALI84-10 vs EPM9320LC84-15 Comparison

Detailed side-by-side comparison of EPM9320ALI84-10 by Intel and EPM9320LC84-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9320ALI84-10 EPM9320LC84-15
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $19.95 $17.95
Family MAX 9000 MAX 9000
Product Type CPLD (Complex Programmable Logic Device) β€”
Usable Gates 6,000 to 12,000 6,000
Macrocells 320 320
User I/O Pins 84 β€”
Package 84-pin PLCC (Plastic Leaded Chip Carrier) 84-pin PLCC (Plastic Leaded Chip Carrier)
Pin-to-Pin Delay (Tpd1) 10 ns β€”
Maximum Counter Frequency 144 MHz β€”
Supply Voltage (VCC) 5.0 V 4.75 V to 5.25 V (5.0 V nominal)
In-System Programmability Yes, via IEEE 1149.1 JTAG β€”
Program Memory Technology CMOS EEPROM β€”
Process Technology CMOS β€”
Architecture Multiple Array MatriX (MAX) β€”
Operating Temperature Range -40C to +85C (Industrial) β€”
Mounting Type Surface Mount (PLCC socket compatible) Surface Mount
Series β€” EPM9320
Device Type β€” CPLD (Complex Programmable Logic Device)
Logic Array Blocks (LABs) β€” 20
Propagation Delay (tPD) β€” 15 ns (max)
Maximum Clock Frequency β€” 117.6 MHz
Programmability β€” 5.0 V in-system programmable (ISP) via JTAG
JTAG Interface β€” IEEE Std. 1149.1 boundary-scan compliant
Operating Temperature β€” -40C to +85C (commercial) [DATA_NEEDED: exact grade]
Technology β€” CMOS EEPROM-based, third-generation Multiple Array MatriX (MAX)
Built-in Pull-up Resistors β€” Yes, on every I/O pin
Architecture Feature β€” Pin-locking across design iterations
RoHS Status β€” [DATA_NEEDED: confirm from manufacturer]

Datasheets & Resources

Browse All Products Create BOM Request Quote