EPM9320ARC208-10 vs EPM9320BC356-15 Comparison

Detailed side-by-side comparison of EPM9320ARC208-10 by Altera and EPM9320BC356-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9320ARC208-10

EPM9320ARC208-10 - MAX 9000 CPLD, 320 Macro, 10ns | Altera

EPM9320ARC208-10 ⚠ Last Time Buy
Altera
EPM9320BC356-15

EPM9320BC356-15 - MAX 9000 CPLD, 320 Macro, 15ns, BGA-356 | Altera

EPM9320BC356-15 Nrnd

Specification Comparison

Parameter EPM9320ARC208-10 EPM9320BC356-15
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $21.40 $31.20
Device Family MAX 9000 β€”
Product Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 320 320
Usable Gates 6,000 β€”
Pin-to-Pin Delay (tPD) 10 ns β€”
Maximum Frequency 144.9 MHz β€”
Supply Voltage 5.0 V β€”
Logic Blocks (LABs) 16 β€”
Programmability EEPROM, in-system programmable via JTAG β€”
JTAG Support IEEE Std. 1149.1 compliant β€”
Speed/Power Optimization Per-macrocell programmable, 50% power mode available β€”
Package RQFP-208 (Power Quad Flat Pack) 356-ball LBGA (BGA-356, 35x35 mm)
Mounting Type Surface Mount Surface Mount
Operating Temperature [DATA_NEEDED: operating temperature range] β€”
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS compliance status]
Family β€” MAX 9000
Device Type β€” CPLD (Complex Programmable Logic Device)
Architecture β€” Multiple Array MatriX (MAX) - third generation
Pin-to-Pin Delay (max) β€” 15 ns
Process Technology β€” CMOS EEPROM
Supply Voltage (VCC) β€” 4.75 V to 5.25 V (5.0 V typical)
In-System Programmability β€” Yes (5.0-V ISP via JTAG)
JTAG Interface β€” IEEE Std. 1149.1 compliant
Programmable Type β€” In System Programmable
Operating Temperature Grade β€” Commercial
Lead-Free β€” [DATA_NEEDED: lead-free status]

Datasheets & Resources

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