EPM9320ARC208-10 vs EPM9320RC208-20 Comparison
Detailed side-by-side comparison of EPM9320ARC208-10 by Altera and EPM9320RC208-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320ARC208-10 | EPM9320RC208-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $21.40 | $21.90 |
| Device Family | MAX 9000 | β |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Macrocells | 320 | 320 |
| Usable Gates | 6,000 | 6,000 |
| Pin-to-Pin Delay (tPD) | 10 ns | β |
| Maximum Frequency | 144.9 MHz | β |
| Supply Voltage | 5.0 V | β |
| Logic Blocks (LABs) | 16 | β |
| Programmability | EEPROM, in-system programmable via JTAG | β |
| JTAG Support | IEEE Std. 1149.1 compliant | β |
| Speed/Power Optimization | Per-macrocell programmable, 50% power mode available | β |
| Package | RQFP-208 (Power Quad Flat Pack) | 208-RQFP, exposed pad (208-BFQFP) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | 0 Β°C to 70 Β°C (commercial) |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | β |
| Family | β | MAX 9000 |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | β | 20 |
| Maximum I/O Pins | β | 132 |
| Propagation Delay (tPD max) | β | 20 ns |
| Supply Voltage (VCCINT) | β | 4.75 V to 5.25 V |
| Programming Technology | β | EEPROM, in-system programmable (ISP) |
| Boundary-Scan Interface | β | IEEE Std. 1149.1 (JTAG) |
| Architecture | β | Multiple Array Matrix (MAX), 3rd generation |
| Process Technology | β | CMOS, 5.0 V EEPROM |
| Reprogrammability | β | Yes, unlimited ISP cycles |