EPM9320ARC208-10N vs EPM9320ARC208-10 Comparison

Detailed side-by-side comparison of EPM9320ARC208-10N by Altera and EPM9320ARC208-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9320ARC208-10 EPM9320ARC208-10 - MAX 9000 CPLD, 320 Macro, 10ns | Altera

EPM9320ARC208-10 - MAX 9000 CPLD, 320 Macro, 10ns | Altera

EPM9320ARC208-10 ⚠ Last Time Buy

Specification Comparison

Parameter EPM9320ARC208-10N EPM9320ARC208-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $19.45 $21.40
Family MAX 9000 β€”
Device Type CPLD (Complex Programmable Logic Device) β€”
Macro Cells 320 β€”
Logic Gates 6,000 gates β€”
Logic Array Blocks (LABs) 16 β€”
Propagation Delay (tPD) 10 ns β€”
Maximum Frequency 144.9 MHz 144.9 MHz
Supply Voltage (VCC) 5 V β€”
User I/O Pins 168 β€”
Dedicated Input Pins 12 β€”
Package 208-pin RQFP (BFQFP with exposed pad) RQFP-208 (Power Quad Flat Pack)
Mounting Type Surface Mount Surface Mount
Operating Temperature 0C to +70C (Commercial) [DATA_NEEDED: operating temperature range]
Programming Interface IEEE Std. 1149.1 JTAG β€”
Configuration Memory Non-volatile EEPROM β€”
RoHS Status Compliant (lead-free 'N' suffix) [DATA_NEEDED: RoHS compliance status]
Device Family β€” MAX 9000
Product Type β€” CPLD (Complex Programmable Logic Device)
Macrocells β€” 320
Usable Gates β€” 6,000
Pin-to-Pin Delay (tPD) β€” 10 ns
Supply Voltage β€” 5.0 V
Logic Blocks (LABs) β€” 16
Programmability β€” EEPROM, in-system programmable via JTAG
JTAG Support β€” IEEE Std. 1149.1 compliant
Speed/Power Optimization β€” Per-macrocell programmable, 50% power mode available

Datasheets & Resources

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