EPM9320ARC208-10N vs EPM9320RC208-20 Comparison
Detailed side-by-side comparison of EPM9320ARC208-10N by Altera and EPM9320RC208-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9320ARC208-10N | EPM9320RC208-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $19.45 | $21.90 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 320 | β |
| Logic Gates | 6,000 gates | β |
| Logic Array Blocks (LABs) | 16 | 20 |
| Propagation Delay (tPD) | 10 ns | β |
| Maximum Frequency | 144.9 MHz | β |
| Supply Voltage (VCC) | 5 V | β |
| User I/O Pins | 168 | β |
| Dedicated Input Pins | 12 | β |
| Package | 208-pin RQFP (BFQFP with exposed pad) | 208-RQFP, exposed pad (208-BFQFP) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +70C (Commercial) | 0 Β°C to 70 Β°C (commercial) |
| Programming Interface | IEEE Std. 1149.1 JTAG | β |
| Configuration Memory | Non-volatile EEPROM | β |
| RoHS Status | Compliant (lead-free 'N' suffix) | β |
| Macrocells | β | 320 |
| Usable Gates | β | 6,000 |
| Maximum I/O Pins | β | 132 |
| Propagation Delay (tPD max) | β | 20 ns |
| Supply Voltage (VCCINT) | β | 4.75 V to 5.25 V |
| Programming Technology | β | EEPROM, in-system programmable (ISP) |
| Boundary-Scan Interface | β | IEEE Std. 1149.1 (JTAG) |
| Architecture | β | Multiple Array Matrix (MAX), 3rd generation |
| Process Technology | β | CMOS, 5.0 V EEPROM |
| Reprogrammability | β | Yes, unlimited ISP cycles |